Expand description
Platform-specific intrinsics for the aarch64
platform.
See the module documentation for more details.
Structs
- float64x1_tAArch64ARM-specific 64-bit wide vector of one packed
f64
. - float64x1x2_tAArch64ARM-specific type containing two
float64x1_t
vectors. - float64x1x3_tAArch64ARM-specific type containing three
float64x1_t
vectors. - float64x1x4_tAArch64ARM-specific type containing four
float64x1_t
vectors. - float64x2_tAArch64ARM-specific 128-bit wide vector of two packed
f64
. - float64x2x2_tAArch64ARM-specific type containing two
float64x2_t
vectors. - float64x2x3_tAArch64ARM-specific type containing three
float64x2_t
vectors. - float64x2x4_tAArch64ARM-specific type containing four
float64x2_t
vectors. - ISHExperimentalInner Shareable is the required shareability domain, reads and writes are the required access types
- ISHSTExperimentalInner Shareable is the required shareability domain, writes are the required access type
- NSHExperimentalNon-shareable is the required shareability domain, reads and writes are the required access types
- NSHSTExperimentalNon-shareable is the required shareability domain, writes are the required access type
- OSHExperimentalOuter Shareable is the required shareability domain, reads and writes are the required access types
- OSHSTExperimentalOuter Shareable is the required shareability domain, writes are the required access type
- STExperimentalFull system is the required shareability domain, writes are the required access type
- SYExperimentalFull system is the required shareability domain, reads and writes are the required access types
- float32x2_tExperimentalARM-specific 64-bit wide vector of two packed
f32
. - float32x2x2_tExperimentalARM-specific type containing two
float32x2_t
vectors. - float32x2x3_tExperimentalARM-specific type containing three
float32x2_t
vectors. - float32x2x4_tExperimentalARM-specific type containing four
float32x2_t
vectors. - float32x4_tExperimentalARM-specific 128-bit wide vector of four packed
f32
. - float32x4x2_tExperimentalARM-specific type containing two
float32x4_t
vectors. - float32x4x3_tExperimentalARM-specific type containing three
float32x4_t
vectors. - float32x4x4_tExperimentalARM-specific type containing four
float32x4_t
vectors. - int8x8_tExperimentalARM-specific 64-bit wide vector of eight packed
i8
. - int8x8x2_tExperimentalARM-specific type containing two
int8x8_t
vectors. - int8x8x3_tExperimentalARM-specific type containing three
int8x8_t
vectors. - int8x8x4_tExperimentalARM-specific type containing four
int8x8_t
vectors. - int8x16_tExperimentalARM-specific 128-bit wide vector of sixteen packed
i8
. - int8x16x2_tExperimentalARM-specific type containing two
int8x16_t
vectors. - int8x16x3_tExperimentalARM-specific type containing three
int8x16_t
vectors. - int8x16x4_tExperimentalARM-specific type containing four
int8x16_t
vectors. - int16x4_tExperimentalARM-specific 64-bit wide vector of four packed
i16
. - int16x4x2_tExperimentalARM-specific type containing two
int16x4_t
vectors. - int16x4x3_tExperimentalARM-specific type containing three
int16x4_t
vectors. - int16x4x4_tExperimentalARM-specific type containing four
int16x4_t
vectors. - int16x8_tExperimentalARM-specific 128-bit wide vector of eight packed
i16
. - int16x8x2_tExperimentalARM-specific type containing two
int16x8_t
vectors. - int16x8x3_tExperimentalARM-specific type containing three
int16x8_t
vectors. - int16x8x4_tExperimentalARM-specific type containing four
int16x8_t
vectors. - int32x2_tExperimentalARM-specific 64-bit wide vector of two packed
i32
. - int32x2x2_tExperimentalARM-specific type containing two
int32x2_t
vectors. - int32x2x3_tExperimentalARM-specific type containing three
int32x2_t
vectors. - int32x2x4_tExperimentalARM-specific type containing four
int32x2_t
vectors. - int32x4_tExperimentalARM-specific 128-bit wide vector of four packed
i32
. - int32x4x2_tExperimentalARM-specific type containing two
int32x4_t
vectors. - int32x4x3_tExperimentalARM-specific type containing three
int32x4_t
vectors. - int32x4x4_tExperimentalARM-specific type containing four
int32x4_t
vectors. - int64x1_tExperimentalARM-specific 64-bit wide vector of one packed
i64
. - int64x1x2_tExperimentalARM-specific type containing four
int64x1_t
vectors. - int64x1x3_tExperimentalARM-specific type containing four
int64x1_t
vectors. - int64x1x4_tExperimentalARM-specific type containing four
int64x1_t
vectors. - int64x2_tExperimentalARM-specific 128-bit wide vector of two packed
i64
. - int64x2x2_tExperimentalARM-specific type containing four
int64x2_t
vectors. - int64x2x3_tExperimentalARM-specific type containing four
int64x2_t
vectors. - int64x2x4_tExperimentalARM-specific type containing four
int64x2_t
vectors. - poly8x8_tExperimentalARM-specific 64-bit wide polynomial vector of eight packed
p8
. - poly8x8x2_tExperimentalARM-specific type containing two
poly8x8_t
vectors. - poly8x8x3_tExperimentalARM-specific type containing three
poly8x8_t
vectors. - poly8x8x4_tExperimentalARM-specific type containing four
poly8x8_t
vectors. - poly8x16_tExperimentalARM-specific 128-bit wide vector of sixteen packed
p8
. - poly8x16x2_tExperimentalARM-specific type containing two
poly8x16_t
vectors. - poly8x16x3_tExperimentalARM-specific type containing three
poly8x16_t
vectors. - poly8x16x4_tExperimentalARM-specific type containing four
poly8x16_t
vectors. - poly16x4_tExperimentalARM-specific 64-bit wide vector of four packed
p16
. - poly16x4x2_tExperimentalARM-specific type containing two
poly16x4_t
vectors. - poly16x4x3_tExperimentalARM-specific type containing three
poly16x4_t
vectors. - poly16x4x4_tExperimentalARM-specific type containing four
poly16x4_t
vectors. - poly16x8_tExperimentalARM-specific 128-bit wide vector of eight packed
p16
. - poly16x8x2_tExperimentalARM-specific type containing two
poly16x8_t
vectors. - poly16x8x3_tExperimentalARM-specific type containing three
poly16x8_t
vectors. - poly16x8x4_tExperimentalARM-specific type containing four
poly16x8_t
vectors. - poly64x1_tExperimentalARM-specific 64-bit wide vector of one packed
p64
. - poly64x1x2_tExperimentalARM-specific type containing four
poly64x1_t
vectors. - poly64x1x3_tExperimentalARM-specific type containing four
poly64x1_t
vectors. - poly64x1x4_tExperimentalARM-specific type containing four
poly64x1_t
vectors. - poly64x2_tExperimentalARM-specific 128-bit wide vector of two packed
p64
. - poly64x2x2_tExperimentalARM-specific type containing four
poly64x2_t
vectors. - poly64x2x3_tExperimentalARM-specific type containing four
poly64x2_t
vectors. - poly64x2x4_tExperimentalARM-specific type containing four
poly64x2_t
vectors. - uint8x8_tExperimentalARM-specific 64-bit wide vector of eight packed
u8
. - uint8x8x2_tExperimentalARM-specific type containing two
uint8x8_t
vectors. - uint8x8x3_tExperimentalARM-specific type containing three
uint8x8_t
vectors. - uint8x8x4_tExperimentalARM-specific type containing four
uint8x8_t
vectors. - uint8x16_tExperimentalARM-specific 128-bit wide vector of sixteen packed
u8
. - uint8x16x2_tExperimentalARM-specific type containing two
uint8x16_t
vectors. - uint8x16x3_tExperimentalARM-specific type containing three
uint8x16_t
vectors. - uint8x16x4_tExperimentalARM-specific type containing four
uint8x16_t
vectors. - uint16x4_tExperimentalARM-specific 64-bit wide vector of four packed
u16
. - uint16x4x2_tExperimentalARM-specific type containing two
uint16x4_t
vectors. - uint16x4x3_tExperimentalARM-specific type containing three
uint16x4_t
vectors. - uint16x4x4_tExperimentalARM-specific type containing four
uint16x4_t
vectors. - uint16x8_tExperimentalARM-specific 128-bit wide vector of eight packed
u16
. - uint16x8x2_tExperimentalARM-specific type containing two
uint16x8_t
vectors. - uint16x8x3_tExperimentalARM-specific type containing three
uint16x8_t
vectors. - uint16x8x4_tExperimentalARM-specific type containing four
uint16x8_t
vectors. - uint32x2_tExperimentalARM-specific 64-bit wide vector of two packed
u32
. - uint32x2x2_tExperimentalARM-specific type containing two
uint32x2_t
vectors. - uint32x2x3_tExperimentalARM-specific type containing three
uint32x2_t
vectors. - uint32x2x4_tExperimentalARM-specific type containing four
uint32x2_t
vectors. - uint32x4_tExperimentalARM-specific 128-bit wide vector of four packed
u32
. - uint32x4x2_tExperimentalARM-specific type containing two
uint32x4_t
vectors. - uint32x4x3_tExperimentalARM-specific type containing three
uint32x4_t
vectors. - uint32x4x4_tExperimentalARM-specific type containing four
uint32x4_t
vectors. - uint64x1_tExperimentalARM-specific 64-bit wide vector of one packed
u64
. - uint64x1x2_tExperimentalARM-specific type containing four
uint64x1_t
vectors. - uint64x1x3_tExperimentalARM-specific type containing four
uint64x1_t
vectors. - uint64x1x4_tExperimentalARM-specific type containing four
uint64x1_t
vectors. - uint64x2_tExperimentalARM-specific 128-bit wide vector of two packed
u64
. - uint64x2x2_tExperimentalARM-specific type containing four
uint64x2_t
vectors. - uint64x2x3_tExperimentalARM-specific type containing four
uint64x2_t
vectors. - uint64x2x4_tExperimentalARM-specific type containing four
uint64x2_t
vectors.
Constants
- See
prefetch
. - See
prefetch
. - See
prefetch
. - See
prefetch
. - See
prefetch
. - See
prefetch
. - Transaction executed a TCANCEL instruction
- Transaction aborted due to a debug trap.
- Transaction aborted because a non-permissible operation was attempted
- Fallback error type for any other reason
- Transaction failed from interrupt
- Transaction aborted because a conflict occurred
- Transaction aborted due to transactional nesting level was exceeded
- Extraction mask for failure reason
- Transaction retry is possible.
- Transaction aborted due to read or write set limit was exceeded
- Indicates a TRIVIAL version of TM is available
- Transaction successfully started.
Functions
- vabal_high_s8⚠AArch64 and
neon
Signed Absolute difference and Accumulate Long - vabal_high_s16⚠AArch64 and
neon
Signed Absolute difference and Accumulate Long - vabal_high_s32⚠AArch64 and
neon
Signed Absolute difference and Accumulate Long - vabal_high_u8⚠AArch64 and
neon
Unsigned Absolute difference and Accumulate Long - vabal_high_u16⚠AArch64 and
neon
Unsigned Absolute difference and Accumulate Long - vabal_high_u32⚠AArch64 and
neon
Unsigned Absolute difference and Accumulate Long - vabd_f64⚠AArch64 and
neon
Absolute difference between the arguments of Floating - vabdd_f64⚠AArch64 and
neon
Floating-point absolute difference - vabdl_high_s8⚠AArch64 and
neon
Signed Absolute difference Long - vabdl_high_s16⚠AArch64 and
neon
Signed Absolute difference Long - vabdl_high_s32⚠AArch64 and
neon
Signed Absolute difference Long - vabdl_high_u8⚠AArch64 and
neon
Unsigned Absolute difference Long - vabdl_high_u16⚠AArch64 and
neon
Unsigned Absolute difference Long - vabdl_high_u32⚠AArch64 and
neon
Unsigned Absolute difference Long - vabdq_f64⚠AArch64 and
neon
Absolute difference between the arguments of Floating - vabds_f32⚠AArch64 and
neon
Floating-point absolute difference - vabs_f64⚠AArch64 and
neon
Floating-point absolute value - vabs_s64⚠AArch64 and
neon
Absolute Value (wrapping). - vabsd_s64⚠AArch64 and
neon
Absolute Value (wrapping). - vabsq_f64⚠AArch64 and
neon
Floating-point absolute value - vabsq_s64⚠AArch64 and
neon
Absolute Value (wrapping). - vadd_f64⚠AArch64 and
neon
Vector add. - vadd_s64⚠AArch64 and
neon
Vector add. - vadd_u64⚠AArch64 and
neon
Vector add. - vaddd_s64⚠AArch64 and
neon
Vector add. - vaddd_u64⚠AArch64 and
neon
Vector add. - vaddlv_s8⚠AArch64 and
neon
Signed Add Long across Vector - vaddlv_s16⚠AArch64 and
neon
Signed Add Long across Vector - vaddlv_s32⚠AArch64 and
neon
Signed Add Long across Vector - vaddlv_u8⚠AArch64 and
neon
Unsigned Add Long across Vector - vaddlv_u16⚠AArch64 and
neon
Unsigned Add Long across Vector - vaddlv_u32⚠AArch64 and
neon
Unsigned Add Long across Vector - vaddlvq_s8⚠AArch64 and
neon
Signed Add Long across Vector - vaddlvq_s16⚠AArch64 and
neon
Signed Add Long across Vector - vaddlvq_s32⚠AArch64 and
neon
Signed Add Long across Vector - vaddlvq_u8⚠AArch64 and
neon
Unsigned Add Long across Vector - vaddlvq_u16⚠AArch64 and
neon
Unsigned Add Long across Vector - vaddlvq_u32⚠AArch64 and
neon
Unsigned Add Long across Vector - vaddq_f64⚠AArch64 and
neon
Vector add. - vaddv_f32⚠AArch64 and
neon
Floating-point add across vector - vaddv_s8⚠AArch64 and
neon
Add across vector - vaddv_s16⚠AArch64 and
neon
Add across vector - vaddv_s32⚠AArch64 and
neon
Add across vector - vaddv_u8⚠AArch64 and
neon
Add across vector - vaddv_u16⚠AArch64 and
neon
Add across vector - vaddv_u32⚠AArch64 and
neon
Add across vector - vaddvq_f32⚠AArch64 and
neon
Floating-point add across vector - vaddvq_f64⚠AArch64 and
neon
Floating-point add across vector - vaddvq_s8⚠AArch64 and
neon
Add across vector - vaddvq_s16⚠AArch64 and
neon
Add across vector - vaddvq_s32⚠AArch64 and
neon
Add across vector - vaddvq_s64⚠AArch64 and
neon
Add across vector - vaddvq_u8⚠AArch64 and
neon
Add across vector - vaddvq_u16⚠AArch64 and
neon
Add across vector - vaddvq_u32⚠AArch64 and
neon
Add across vector - vaddvq_u64⚠AArch64 and
neon
Add across vector - vbsl_f64⚠AArch64 and
neon
Bitwise Select instructions. This instruction sets each bit in the destination SIMD&FP register to the corresponding bit from the first source SIMD&FP register when the original destination bit was 1, otherwise from the second source SIMD&FP register. - vbsl_p64⚠AArch64 and
neon
Bitwise Select. - vbslq_f64⚠AArch64 and
neon
Bitwise Select. (128-bit) - vbslq_p64⚠AArch64 and
neon
Bitwise Select. (128-bit) - vcage_f64⚠AArch64 and
neon
Floating-point absolute compare greater than or equal - vcaged_f64⚠AArch64 and
neon
Floating-point absolute compare greater than or equal - vcageq_f64⚠AArch64 and
neon
Floating-point absolute compare greater than or equal - vcages_f32⚠AArch64 and
neon
Floating-point absolute compare greater than or equal - vcagt_f64⚠AArch64 and
neon
Floating-point absolute compare greater than - vcagtd_f64⚠AArch64 and
neon
Floating-point absolute compare greater than - vcagtq_f64⚠AArch64 and
neon
Floating-point absolute compare greater than - vcagts_f32⚠AArch64 and
neon
Floating-point absolute compare greater than - vcale_f64⚠AArch64 and
neon
Floating-point absolute compare less than or equal - vcaled_f64⚠AArch64 and
neon
Floating-point absolute compare less than or equal - vcaleq_f64⚠AArch64 and
neon
Floating-point absolute compare less than or equal - vcales_f32⚠AArch64 and
neon
Floating-point absolute compare less than or equal - vcalt_f64⚠AArch64 and
neon
Floating-point absolute compare less than - vcaltd_f64⚠AArch64 and
neon
Floating-point absolute compare less than - vcaltq_f64⚠AArch64 and
neon
Floating-point absolute compare less than - vcalts_f32⚠AArch64 and
neon
Floating-point absolute compare less than - vceq_f64⚠AArch64 and
neon
Floating-point compare equal - vceq_p64⚠AArch64 and
neon
Compare bitwise Equal (vector) - vceq_s64⚠AArch64 and
neon
Compare bitwise Equal (vector) - vceq_u64⚠AArch64 and
neon
Compare bitwise Equal (vector) - vceqd_f64⚠AArch64 and
neon
Floating-point compare equal - vceqd_s64⚠AArch64 and
neon
Compare bitwise equal - vceqd_u64⚠AArch64 and
neon
Compare bitwise equal - vceqq_f64⚠AArch64 and
neon
Floating-point compare equal - vceqq_p64⚠AArch64 and
neon
Compare bitwise Equal (vector) - vceqq_s64⚠AArch64 and
neon
Compare bitwise Equal (vector) - vceqq_u64⚠AArch64 and
neon
Compare bitwise Equal (vector) - vceqs_f32⚠AArch64 and
neon
Floating-point compare equal - vceqz_f32⚠AArch64 and
neon
Floating-point compare bitwise equal to zero - vceqz_f64⚠AArch64 and
neon
Floating-point compare bitwise equal to zero - vceqz_p8⚠AArch64 and
neon
Signed compare bitwise equal to zero - vceqz_p64⚠AArch64 and
neon
Signed compare bitwise equal to zero - vceqz_s8⚠AArch64 and
neon
Signed compare bitwise equal to zero - vceqz_s16⚠AArch64 and
neon
Signed compare bitwise equal to zero - vceqz_s32⚠AArch64 and
neon
Signed compare bitwise equal to zero - vceqz_s64⚠AArch64 and
neon
Signed compare bitwise equal to zero - vceqz_u8⚠AArch64 and
neon
Unsigned compare bitwise equal to zero - vceqz_u16⚠AArch64 and
neon
Unsigned compare bitwise equal to zero - vceqz_u32⚠AArch64 and
neon
Unsigned compare bitwise equal to zero - vceqz_u64⚠AArch64 and
neon
Unsigned compare bitwise equal to zero - vceqzd_f64⚠AArch64 and
neon
Floating-point compare bitwise equal to zero - vceqzd_s64⚠AArch64 and
neon
Compare bitwise equal to zero - vceqzd_u64⚠AArch64 and
neon
Compare bitwise equal to zero - vceqzq_f32⚠AArch64 and
neon
Floating-point compare bitwise equal to zero - vceqzq_f64⚠AArch64 and
neon
Floating-point compare bitwise equal to zero - vceqzq_p8⚠AArch64 and
neon
Signed compare bitwise equal to zero - vceqzq_p64⚠AArch64 and
neon
Signed compare bitwise equal to zero - vceqzq_s8⚠AArch64 and
neon
Signed compare bitwise equal to zero - vceqzq_s16⚠AArch64 and
neon
Signed compare bitwise equal to zero - vceqzq_s32⚠AArch64 and
neon
Signed compare bitwise equal to zero - vceqzq_s64⚠AArch64 and
neon
Signed compare bitwise equal to zero - vceqzq_u8⚠AArch64 and
neon
Unsigned compare bitwise equal to zero - vceqzq_u16⚠AArch64 and
neon
Unsigned compare bitwise equal to zero - vceqzq_u32⚠AArch64 and
neon
Unsigned compare bitwise equal to zero - vceqzq_u64⚠AArch64 and
neon
Unsigned compare bitwise equal to zero - vceqzs_f32⚠AArch64 and
neon
Floating-point compare bitwise equal to zero - vcge_f64⚠AArch64 and
neon
Floating-point compare greater than or equal - vcge_s64⚠AArch64 and
neon
Compare signed greater than or equal - vcge_u64⚠AArch64 and
neon
Compare unsigned greater than or equal - vcged_f64⚠AArch64 and
neon
Floating-point compare greater than or equal - vcged_s64⚠AArch64 and
neon
Compare greater than or equal - vcged_u64⚠AArch64 and
neon
Compare greater than or equal - vcgeq_f64⚠AArch64 and
neon
Floating-point compare greater than or equal - vcgeq_s64⚠AArch64 and
neon
Compare signed greater than or equal - vcgeq_u64⚠AArch64 and
neon
Compare unsigned greater than or equal - vcges_f32⚠AArch64 and
neon
Floating-point compare greater than or equal - vcgez_f32⚠AArch64 and
neon
Floating-point compare greater than or equal to zero - vcgez_f64⚠AArch64 and
neon
Floating-point compare greater than or equal to zero - vcgez_s8⚠AArch64 and
neon
Compare signed greater than or equal to zero - vcgez_s16⚠AArch64 and
neon
Compare signed greater than or equal to zero - vcgez_s32⚠AArch64 and
neon
Compare signed greater than or equal to zero - vcgez_s64⚠AArch64 and
neon
Compare signed greater than or equal to zero - vcgezd_f64⚠AArch64 and
neon
Floating-point compare greater than or equal to zero - vcgezd_s64⚠AArch64 and
neon
Compare signed greater than or equal to zero - vcgezq_f32⚠AArch64 and
neon
Floating-point compare greater than or equal to zero - vcgezq_f64⚠AArch64 and
neon
Floating-point compare greater than or equal to zero - vcgezq_s8⚠AArch64 and
neon
Compare signed greater than or equal to zero - vcgezq_s16⚠AArch64 and
neon
Compare signed greater than or equal to zero - vcgezq_s32⚠AArch64 and
neon
Compare signed greater than or equal to zero - vcgezq_s64⚠AArch64 and
neon
Compare signed greater than or equal to zero - vcgezs_f32⚠AArch64 and
neon
Floating-point compare greater than or equal to zero - vcgt_f64⚠AArch64 and
neon
Floating-point compare greater than - vcgt_s64⚠AArch64 and
neon
Compare signed greater than - vcgt_u64⚠AArch64 and
neon
Compare unsigned greater than - vcgtd_f64⚠AArch64 and
neon
Floating-point compare greater than - vcgtd_s64⚠AArch64 and
neon
Compare greater than - vcgtd_u64⚠AArch64 and
neon
Compare greater than - vcgtq_f64⚠AArch64 and
neon
Floating-point compare greater than - vcgtq_s64⚠AArch64 and
neon
Compare signed greater than - vcgtq_u64⚠AArch64 and
neon
Compare unsigned greater than - vcgts_f32⚠AArch64 and
neon
Floating-point compare greater than - vcgtz_f32⚠AArch64 and
neon
Floating-point compare greater than zero - vcgtz_f64⚠AArch64 and
neon
Floating-point compare greater than zero - vcgtz_s8⚠AArch64 and
neon
Compare signed greater than zero - vcgtz_s16⚠AArch64 and
neon
Compare signed greater than zero - vcgtz_s32⚠AArch64 and
neon
Compare signed greater than zero - vcgtz_s64⚠AArch64 and
neon
Compare signed greater than zero - vcgtzd_f64⚠AArch64 and
neon
Floating-point compare greater than zero - vcgtzd_s64⚠AArch64 and
neon
Compare signed greater than zero - vcgtzq_f32⚠AArch64 and
neon
Floating-point compare greater than zero - vcgtzq_f64⚠AArch64 and
neon
Floating-point compare greater than zero - vcgtzq_s8⚠AArch64 and
neon
Compare signed greater than zero - vcgtzq_s16⚠AArch64 and
neon
Compare signed greater than zero - vcgtzq_s32⚠AArch64 and
neon
Compare signed greater than zero - vcgtzq_s64⚠AArch64 and
neon
Compare signed greater than zero - vcgtzs_f32⚠AArch64 and
neon
Floating-point compare greater than zero - vcle_f64⚠AArch64 and
neon
Floating-point compare less than or equal - vcle_s64⚠AArch64 and
neon
Compare signed less than or equal - vcle_u64⚠AArch64 and
neon
Compare unsigned less than or equal - vcled_f64⚠AArch64 and
neon
Floating-point compare less than or equal - vcled_s64⚠AArch64 and
neon
Compare less than or equal - vcled_u64⚠AArch64 and
neon
Compare less than or equal - vcleq_f64⚠AArch64 and
neon
Floating-point compare less than or equal - vcleq_s64⚠AArch64 and
neon
Compare signed less than or equal - vcleq_u64⚠AArch64 and
neon
Compare unsigned less than or equal - vcles_f32⚠AArch64 and
neon
Floating-point compare less than or equal - vclez_f32⚠AArch64 and
neon
Floating-point compare less than or equal to zero - vclez_f64⚠AArch64 and
neon
Floating-point compare less than or equal to zero - vclez_s8⚠AArch64 and
neon
Compare signed less than or equal to zero - vclez_s16⚠AArch64 and
neon
Compare signed less than or equal to zero - vclez_s32⚠AArch64 and
neon
Compare signed less than or equal to zero - vclez_s64⚠AArch64 and
neon
Compare signed less than or equal to zero - vclezd_f64⚠AArch64 and
neon
Floating-point compare less than or equal to zero - vclezd_s64⚠AArch64 and
neon
Compare less than or equal to zero - vclezq_f32⚠AArch64 and
neon
Floating-point compare less than or equal to zero - vclezq_f64⚠AArch64 and
neon
Floating-point compare less than or equal to zero - vclezq_s8⚠AArch64 and
neon
Compare signed less than or equal to zero - vclezq_s16⚠AArch64 and
neon
Compare signed less than or equal to zero - vclezq_s32⚠AArch64 and
neon
Compare signed less than or equal to zero - vclezq_s64⚠AArch64 and
neon
Compare signed less than or equal to zero - vclezs_f32⚠AArch64 and
neon
Floating-point compare less than or equal to zero - vclt_f64⚠AArch64 and
neon
Floating-point compare less than - vclt_s64⚠AArch64 and
neon
Compare signed less than - vclt_u64⚠AArch64 and
neon
Compare unsigned less than - vcltd_f64⚠AArch64 and
neon
Floating-point compare less than - vcltd_s64⚠AArch64 and
neon
Compare less than - vcltd_u64⚠AArch64 and
neon
Compare less than - vcltq_f64⚠AArch64 and
neon
Floating-point compare less than - vcltq_s64⚠AArch64 and
neon
Compare signed less than - vcltq_u64⚠AArch64 and
neon
Compare unsigned less than - vclts_f32⚠AArch64 and
neon
Floating-point compare less than - vcltz_f32⚠AArch64 and
neon
Floating-point compare less than zero - vcltz_f64⚠AArch64 and
neon
Floating-point compare less than zero - vcltz_s8⚠AArch64 and
neon
Compare signed less than zero - vcltz_s16⚠AArch64 and
neon
Compare signed less than zero - vcltz_s32⚠AArch64 and
neon
Compare signed less than zero - vcltz_s64⚠AArch64 and
neon
Compare signed less than zero - vcltzd_f64⚠AArch64 and
neon
Floating-point compare less than zero - vcltzd_s64⚠AArch64 and
neon
Compare less than zero - vcltzq_f32⚠AArch64 and
neon
Floating-point compare less than zero - vcltzq_f64⚠AArch64 and
neon
Floating-point compare less than zero - vcltzq_s8⚠AArch64 and
neon
Compare signed less than zero - vcltzq_s16⚠AArch64 and
neon
Compare signed less than zero - vcltzq_s32⚠AArch64 and
neon
Compare signed less than zero - vcltzq_s64⚠AArch64 and
neon
Compare signed less than zero - vcltzs_f32⚠AArch64 and
neon
Floating-point compare less than zero - vcombine_f32⚠
neon
andv7
Vector combine - vcombine_f64⚠AArch64 and
neon
Vector combine - vcombine_p8⚠
neon
andv7
Vector combine - vcombine_p16⚠
neon
andv7
Vector combine - vcopy_lane_f32⚠AArch64 and
neon
Insert vector element from another vector element - vcopy_lane_f64⚠AArch64 and
neon
Duplicate vector element to vector or scalar - vcopy_lane_p8⚠AArch64 and
neon
Insert vector element from another vector element - vcopy_lane_p16⚠AArch64 and
neon
Insert vector element from another vector element - vcopy_lane_p64⚠AArch64 and
neon
Duplicate vector element to vector or scalar - vcopy_lane_s8⚠AArch64 and
neon
Insert vector element from another vector element - vcopy_lane_s16⚠AArch64 and
neon
Insert vector element from another vector element - vcopy_lane_s32⚠AArch64 and
neon
Insert vector element from another vector element - vcopy_lane_s64⚠AArch64 and
neon
Duplicate vector element to vector or scalar - vcopy_lane_u8⚠AArch64 and
neon
Insert vector element from another vector element - vcopy_lane_u16⚠AArch64 and
neon
Insert vector element from another vector element - vcopy_lane_u32⚠AArch64 and
neon
Insert vector element from another vector element - vcopy_lane_u64⚠AArch64 and
neon
Duplicate vector element to vector or scalar - vcopy_laneq_f32⚠AArch64 and
neon
Insert vector element from another vector element - vcopy_laneq_f64⚠AArch64 and
neon
Duplicate vector element to vector or scalar - vcopy_laneq_p8⚠AArch64 and
neon
Insert vector element from another vector element - vcopy_laneq_p16⚠AArch64 and
neon
Insert vector element from another vector element - vcopy_laneq_p64⚠AArch64 and
neon
Duplicate vector element to vector or scalar - vcopy_laneq_s8⚠AArch64 and
neon
Insert vector element from another vector element - vcopy_laneq_s16⚠AArch64 and
neon
Insert vector element from another vector element - vcopy_laneq_s32⚠AArch64 and
neon
Insert vector element from another vector element - vcopy_laneq_s64⚠AArch64 and
neon
Duplicate vector element to vector or scalar - vcopy_laneq_u8⚠AArch64 and
neon
Insert vector element from another vector element - vcopy_laneq_u16⚠AArch64 and
neon
Insert vector element from another vector element - vcopy_laneq_u32⚠AArch64 and
neon
Insert vector element from another vector element - vcopy_laneq_u64⚠AArch64 and
neon
Duplicate vector element to vector or scalar - vcopyq_lane_f32⚠AArch64 and
neon
Insert vector element from another vector element - vcopyq_lane_f64⚠AArch64 and
neon
Insert vector element from another vector element - vcopyq_lane_p8⚠AArch64 and
neon
Insert vector element from another vector element - vcopyq_lane_p16⚠AArch64 and
neon
Insert vector element from another vector element - vcopyq_lane_p64⚠AArch64 and
neon
Insert vector element from another vector element - vcopyq_lane_s8⚠AArch64 and
neon
Insert vector element from another vector element - vcopyq_lane_s16⚠AArch64 and
neon
Insert vector element from another vector element - vcopyq_lane_s32⚠AArch64 and
neon
Insert vector element from another vector element - vcopyq_lane_s64⚠AArch64 and
neon
Insert vector element from another vector element - vcopyq_lane_u8⚠AArch64 and
neon
Insert vector element from another vector element - vcopyq_lane_u16⚠AArch64 and
neon
Insert vector element from another vector element - vcopyq_lane_u32⚠AArch64 and
neon
Insert vector element from another vector element - vcopyq_lane_u64⚠AArch64 and
neon
Insert vector element from another vector element - vcopyq_laneq_f32⚠AArch64 and
neon
Insert vector element from another vector element - vcopyq_laneq_f64⚠AArch64 and
neon
Insert vector element from another vector element - vcopyq_laneq_p8⚠AArch64 and
neon
Insert vector element from another vector element - vcopyq_laneq_p16⚠AArch64 and
neon
Insert vector element from another vector element - vcopyq_laneq_p64⚠AArch64 and
neon
Insert vector element from another vector element - vcopyq_laneq_s8⚠AArch64 and
neon
Insert vector element from another vector element - vcopyq_laneq_s16⚠AArch64 and
neon
Insert vector element from another vector element - vcopyq_laneq_s32⚠AArch64 and
neon
Insert vector element from another vector element - vcopyq_laneq_s64⚠AArch64 and
neon
Insert vector element from another vector element - vcopyq_laneq_u8⚠AArch64 and
neon
Insert vector element from another vector element - vcopyq_laneq_u16⚠AArch64 and
neon
Insert vector element from another vector element - vcopyq_laneq_u32⚠AArch64 and
neon
Insert vector element from another vector element - vcopyq_laneq_u64⚠AArch64 and
neon
Insert vector element from another vector element - vcreate_f64⚠AArch64 and
neon
Insert vector element from another vector element - vcvt_f32_f64⚠AArch64 and
neon
Floating-point convert to lower precision narrow - vcvt_f64_f32⚠AArch64 and
neon
Floating-point convert to higher precision long - vcvt_f64_s64⚠AArch64 and
neon
Fixed-point convert to floating-point - vcvt_f64_u64⚠AArch64 and
neon
Fixed-point convert to floating-point - vcvt_high_f32_f64⚠AArch64 and
neon
Floating-point convert to lower precision narrow - vcvt_high_f64_f32⚠AArch64 and
neon
Floating-point convert to higher precision long - vcvt_n_f64_s64⚠AArch64 and
neon
Fixed-point convert to floating-point - vcvt_n_f64_u64⚠AArch64 and
neon
Fixed-point convert to floating-point - vcvt_n_s64_f64⚠AArch64 and
neon
Floating-point convert to fixed-point, rounding toward zero - vcvt_n_u64_f64⚠AArch64 and
neon
Floating-point convert to fixed-point, rounding toward zero - vcvt_s64_f64⚠AArch64 and
neon
Floating-point convert to signed fixed-point, rounding toward zero - vcvt_u64_f64⚠AArch64 and
neon
Floating-point convert to unsigned fixed-point, rounding toward zero - vcvta_s32_f32⚠AArch64 and
neon
Floating-point convert to signed integer, rounding to nearest with ties to away - vcvta_s64_f64⚠AArch64 and
neon
Floating-point convert to signed integer, rounding to nearest with ties to away - vcvta_u32_f32⚠AArch64 and
neon
Floating-point convert to unsigned integer, rounding to nearest with ties to away - vcvta_u64_f64⚠AArch64 and
neon
Floating-point convert to unsigned integer, rounding to nearest with ties to away - vcvtad_s64_f64⚠AArch64 and
neon
Floating-point convert to integer, rounding to nearest with ties to away - vcvtad_u64_f64⚠AArch64 and
neon
Floating-point convert to integer, rounding to nearest with ties to away - vcvtaq_s32_f32⚠AArch64 and
neon
Floating-point convert to signed integer, rounding to nearest with ties to away - vcvtaq_s64_f64⚠AArch64 and
neon
Floating-point convert to signed integer, rounding to nearest with ties to away - vcvtaq_u32_f32⚠AArch64 and
neon
Floating-point convert to unsigned integer, rounding to nearest with ties to away - vcvtaq_u64_f64⚠AArch64 and
neon
Floating-point convert to unsigned integer, rounding to nearest with ties to away - vcvtas_s32_f32⚠AArch64 and
neon
Floating-point convert to integer, rounding to nearest with ties to away - vcvtas_u32_f32⚠AArch64 and
neon
Floating-point convert to integer, rounding to nearest with ties to away - vcvtd_f64_s64⚠AArch64 and
neon
Fixed-point convert to floating-point - vcvtd_f64_u64⚠AArch64 and
neon
Fixed-point convert to floating-point - vcvtd_n_f64_s64⚠AArch64 and
neon
Fixed-point convert to floating-point - vcvtd_n_f64_u64⚠AArch64 and
neon
Fixed-point convert to floating-point - vcvtd_n_s64_f64⚠AArch64 and
neon
Floating-point convert to fixed-point, rounding toward zero - vcvtd_n_u64_f64⚠AArch64 and
neon
Floating-point convert to fixed-point, rounding toward zero - vcvtd_s64_f64⚠AArch64 and
neon
Fixed-point convert to floating-point - vcvtd_u64_f64⚠AArch64 and
neon
Fixed-point convert to floating-point - vcvtm_s32_f32⚠AArch64 and
neon
Floating-point convert to signed integer, rounding toward minus infinity - vcvtm_s64_f64⚠AArch64 and
neon
Floating-point convert to signed integer, rounding toward minus infinity - vcvtm_u32_f32⚠AArch64 and
neon
Floating-point convert to unsigned integer, rounding toward minus infinity - vcvtm_u64_f64⚠AArch64 and
neon
Floating-point convert to unsigned integer, rounding toward minus infinity - vcvtmd_s64_f64⚠AArch64 and
neon
Floating-point convert to signed integer, rounding toward minus infinity - vcvtmd_u64_f64⚠AArch64 and
neon
Floating-point convert to unsigned integer, rounding toward minus infinity - vcvtmq_s32_f32⚠AArch64 and
neon
Floating-point convert to signed integer, rounding toward minus infinity - vcvtmq_s64_f64⚠AArch64 and
neon
Floating-point convert to signed integer, rounding toward minus infinity - vcvtmq_u32_f32⚠AArch64 and
neon
Floating-point convert to unsigned integer, rounding toward minus infinity - vcvtmq_u64_f64⚠AArch64 and
neon
Floating-point convert to unsigned integer, rounding toward minus infinity - vcvtms_s32_f32⚠AArch64 and
neon
Floating-point convert to signed integer, rounding toward minus infinity - vcvtms_u32_f32⚠AArch64 and
neon
Floating-point convert to unsigned integer, rounding toward minus infinity - vcvtn_s32_f32⚠AArch64 and
neon
Floating-point convert to signed integer, rounding to nearest with ties to even - vcvtn_s64_f64⚠AArch64 and
neon
Floating-point convert to signed integer, rounding to nearest with ties to even - vcvtn_u32_f32⚠AArch64 and
neon
Floating-point convert to unsigned integer, rounding to nearest with ties to even - vcvtn_u64_f64⚠AArch64 and
neon
Floating-point convert to unsigned integer, rounding to nearest with ties to even - vcvtnd_s64_f64⚠AArch64 and
neon
Floating-point convert to signed integer, rounding to nearest with ties to even - vcvtnd_u64_f64⚠AArch64 and
neon
Floating-point convert to unsigned integer, rounding to nearest with ties to even - vcvtnq_s32_f32⚠AArch64 and
neon
Floating-point convert to signed integer, rounding to nearest with ties to even - vcvtnq_s64_f64⚠AArch64 and
neon
Floating-point convert to signed integer, rounding to nearest with ties to even - vcvtnq_u32_f32⚠AArch64 and
neon
Floating-point convert to unsigned integer, rounding to nearest with ties to even - vcvtnq_u64_f64⚠AArch64 and
neon
Floating-point convert to unsigned integer, rounding to nearest with ties to even - vcvtns_s32_f32⚠AArch64 and
neon
Floating-point convert to signed integer, rounding to nearest with ties to even - vcvtns_u32_f32⚠AArch64 and
neon
Floating-point convert to unsigned integer, rounding to nearest with ties to even - vcvtp_s32_f32⚠AArch64 and
neon
Floating-point convert to signed integer, rounding toward plus infinity - vcvtp_s64_f64⚠AArch64 and
neon
Floating-point convert to signed integer, rounding toward plus infinity - vcvtp_u32_f32⚠AArch64 and
neon
Floating-point convert to unsigned integer, rounding toward plus infinity - vcvtp_u64_f64⚠AArch64 and
neon
Floating-point convert to unsigned integer, rounding toward plus infinity - vcvtpd_s64_f64⚠AArch64 and
neon
Floating-point convert to signed integer, rounding toward plus infinity - vcvtpd_u64_f64⚠AArch64 and
neon
Floating-point convert to unsigned integer, rounding toward plus infinity - vcvtpq_s32_f32⚠AArch64 and
neon
Floating-point convert to signed integer, rounding toward plus infinity - vcvtpq_s64_f64⚠AArch64 and
neon
Floating-point convert to signed integer, rounding toward plus infinity - vcvtpq_u32_f32⚠AArch64 and
neon
Floating-point convert to unsigned integer, rounding toward plus infinity - vcvtpq_u64_f64⚠AArch64 and
neon
Floating-point convert to unsigned integer, rounding toward plus infinity - vcvtps_s32_f32⚠AArch64 and
neon
Floating-point convert to signed integer, rounding toward plus infinity - vcvtps_u32_f32⚠AArch64 and
neon
Floating-point convert to unsigned integer, rounding toward plus infinity - vcvtq_f64_s64⚠AArch64 and
neon
Fixed-point convert to floating-point - vcvtq_f64_u64⚠AArch64 and
neon
Fixed-point convert to floating-point - vcvtq_n_f64_s64⚠AArch64 and
neon
Fixed-point convert to floating-point - vcvtq_n_f64_u64⚠AArch64 and
neon
Fixed-point convert to floating-point - vcvtq_n_s64_f64⚠AArch64 and
neon
Floating-point convert to fixed-point, rounding toward zero - vcvtq_n_u64_f64⚠AArch64 and
neon
Floating-point convert to fixed-point, rounding toward zero - vcvtq_s64_f64⚠AArch64 and
neon
Floating-point convert to signed fixed-point, rounding toward zero - vcvtq_u64_f64⚠AArch64 and
neon
Floating-point convert to unsigned fixed-point, rounding toward zero - vcvts_f32_s32⚠AArch64 and
neon
Fixed-point convert to floating-point - vcvts_f32_u32⚠AArch64 and
neon
Fixed-point convert to floating-point - vcvts_n_f32_s32⚠AArch64 and
neon
Fixed-point convert to floating-point - vcvts_n_f32_u32⚠AArch64 and
neon
Fixed-point convert to floating-point - vcvts_n_s32_f32⚠AArch64 and
neon
Floating-point convert to fixed-point, rounding toward zero - vcvts_n_u32_f32⚠AArch64 and
neon
Floating-point convert to fixed-point, rounding toward zero - vcvts_s32_f32⚠AArch64 and
neon
Fixed-point convert to floating-point - vcvts_u32_f32⚠AArch64 and
neon
Fixed-point convert to floating-point - vcvtx_f32_f64⚠AArch64 and
neon
Floating-point convert to lower precision narrow, rounding to odd - vcvtx_high_f32_f64⚠AArch64 and
neon
Floating-point convert to lower precision narrow, rounding to odd - vcvtxd_f32_f64⚠AArch64 and
neon
Floating-point convert to lower precision narrow, rounding to odd - vdiv_f32⚠AArch64 and
neon
Divide - vdiv_f64⚠AArch64 and
neon
Divide - vdivq_f32⚠AArch64 and
neon
Divide - vdivq_f64⚠AArch64 and
neon
Divide - vdup_lane_f64⚠AArch64 and
neon
Set all vector lanes to the same value - vdup_lane_p64⚠AArch64 and
neon
Set all vector lanes to the same value - vdup_laneq_f64⚠AArch64 and
neon
Set all vector lanes to the same value - vdup_laneq_p64⚠AArch64 and
neon
Set all vector lanes to the same value - vdup_n_f64⚠AArch64 and
neon
Duplicate vector element to vector or scalar - vdup_n_p64⚠AArch64 and
neon
Duplicate vector element to vector or scalar - vdupb_lane_p8⚠AArch64 and
neon
Set all vector lanes to the same value - vdupb_lane_s8⚠AArch64 and
neon
Set all vector lanes to the same value - vdupb_lane_u8⚠AArch64 and
neon
Set all vector lanes to the same value - vdupb_laneq_p8⚠AArch64 and
neon
Set all vector lanes to the same value - vdupb_laneq_s8⚠AArch64 and
neon
Set all vector lanes to the same value - vdupb_laneq_u8⚠AArch64 and
neon
Set all vector lanes to the same value - vdupd_lane_f64⚠AArch64 and
neon
Set all vector lanes to the same value - vdupd_lane_s64⚠AArch64 and
neon
Set all vector lanes to the same value - vdupd_lane_u64⚠AArch64 and
neon
Set all vector lanes to the same value - vdupd_laneq_f64⚠AArch64 and
neon
Set all vector lanes to the same value - vdupd_laneq_s64⚠AArch64 and
neon
Set all vector lanes to the same value - vdupd_laneq_u64⚠AArch64 and
neon
Set all vector lanes to the same value - vduph_lane_p16⚠AArch64 and
neon
Set all vector lanes to the same value - vduph_lane_s16⚠AArch64 and
neon
Set all vector lanes to the same value - vduph_lane_u16⚠AArch64 and
neon
Set all vector lanes to the same value - vduph_laneq_p16⚠AArch64 and
neon
Set all vector lanes to the same value - vduph_laneq_s16⚠AArch64 and
neon
Set all vector lanes to the same value - vduph_laneq_u16⚠AArch64 and
neon
Set all vector lanes to the same value - vdupq_lane_f64⚠AArch64 and
neon
Set all vector lanes to the same value - vdupq_lane_p64⚠AArch64 and
neon
Set all vector lanes to the same value - vdupq_laneq_f64⚠AArch64 and
neon
Set all vector lanes to the same value - vdupq_laneq_p64⚠AArch64 and
neon
Set all vector lanes to the same value - vdupq_n_f64⚠AArch64 and
neon
Duplicate vector element to vector or scalar - vdupq_n_p64⚠AArch64 and
neon
Duplicate vector element to vector or scalar - vdups_lane_f32⚠AArch64 and
neon
Set all vector lanes to the same value - vdups_lane_s32⚠AArch64 and
neon
Set all vector lanes to the same value - vdups_lane_u32⚠AArch64 and
neon
Set all vector lanes to the same value - vdups_laneq_f32⚠AArch64 and
neon
Set all vector lanes to the same value - vdups_laneq_s32⚠AArch64 and
neon
Set all vector lanes to the same value - vdups_laneq_u32⚠AArch64 and
neon
Set all vector lanes to the same value - vext_f64⚠AArch64 and
neon
Extract vector from pair of vectors - vext_p64⚠AArch64 and
neon
Extract vector from pair of vectors - vextq_f64⚠AArch64 and
neon
Extract vector from pair of vectors - vextq_p64⚠AArch64 and
neon
Extract vector from pair of vectors - vfma_f64⚠AArch64 and
neon
Floating-point fused Multiply-Add to accumulator(vector) - vfma_lane_f32⚠AArch64 and
neon
Floating-point fused multiply-add to accumulator - vfma_lane_f64⚠AArch64 and
neon
Floating-point fused multiply-add to accumulator - vfma_laneq_f32⚠AArch64 and
neon
Floating-point fused multiply-add to accumulator - vfma_laneq_f64⚠AArch64 and
neon
Floating-point fused multiply-add to accumulator - vfma_n_f64⚠AArch64 and
neon
Floating-point fused Multiply-Add to accumulator(vector) - vfmad_lane_f64⚠AArch64 and
neon
Floating-point fused multiply-add to accumulator - vfmad_laneq_f64⚠AArch64 and
neon
Floating-point fused multiply-add to accumulator - vfmaq_f64⚠AArch64 and
neon
Floating-point fused Multiply-Add to accumulator(vector) - vfmaq_lane_f32⚠AArch64 and
neon
Floating-point fused multiply-add to accumulator - vfmaq_lane_f64⚠AArch64 and
neon
Floating-point fused multiply-add to accumulator - vfmaq_laneq_f32⚠AArch64 and
neon
Floating-point fused multiply-add to accumulator - vfmaq_laneq_f64⚠AArch64 and
neon
Floating-point fused multiply-add to accumulator - vfmaq_n_f64⚠AArch64 and
neon
Floating-point fused Multiply-Add to accumulator(vector) - vfmas_lane_f32⚠AArch64 and
neon
Floating-point fused multiply-add to accumulator - vfmas_laneq_f32⚠AArch64 and
neon
Floating-point fused multiply-add to accumulator - vfms_f64⚠AArch64 and
neon
Floating-point fused multiply-subtract from accumulator - vfms_lane_f32⚠AArch64 and
neon
Floating-point fused multiply-subtract to accumulator - vfms_lane_f64⚠AArch64 and
neon
Floating-point fused multiply-subtract to accumulator - vfms_laneq_f32⚠AArch64 and
neon
Floating-point fused multiply-subtract to accumulator - vfms_laneq_f64⚠AArch64 and
neon
Floating-point fused multiply-subtract to accumulator - vfms_n_f64⚠AArch64 and
neon
Floating-point fused Multiply-subtract to accumulator(vector) - vfmsd_lane_f64⚠AArch64 and
neon
Floating-point fused multiply-subtract to accumulator - vfmsd_laneq_f64⚠AArch64 and
neon
Floating-point fused multiply-subtract to accumulator - vfmsq_f64⚠AArch64 and
neon
Floating-point fused multiply-subtract from accumulator - vfmsq_lane_f32⚠AArch64 and
neon
Floating-point fused multiply-subtract to accumulator - vfmsq_lane_f64⚠AArch64 and
neon
Floating-point fused multiply-subtract to accumulator - vfmsq_laneq_f32⚠AArch64 and
neon
Floating-point fused multiply-subtract to accumulator - vfmsq_laneq_f64⚠AArch64 and
neon
Floating-point fused multiply-subtract to accumulator - vfmsq_n_f64⚠AArch64 and
neon
Floating-point fused Multiply-subtract to accumulator(vector) - vfmss_lane_f32⚠AArch64 and
neon
Floating-point fused multiply-subtract to accumulator - vfmss_laneq_f32⚠AArch64 and
neon
Floating-point fused multiply-subtract to accumulator - vget_high_f64⚠AArch64 and
neon
Duplicate vector element to vector or scalar - vget_high_p64⚠AArch64 and
neon
Duplicate vector element to vector or scalar - vget_lane_f64⚠AArch64 and
neon
Duplicate vector element to vector or scalar - vget_low_f64⚠AArch64 and
neon
Duplicate vector element to vector or scalar - vget_low_p64⚠AArch64 and
neon
Duplicate vector element to vector or scalar - vgetq_lane_f64⚠AArch64 and
neon
Duplicate vector element to vector or scalar - vld1_dup_f64⚠AArch64 and
neon
Load multiple single-element structures to one, two, three, or four registers - vld1_f32⚠AArch64 and
neon
Load multiple single-element structures to one, two, three, or four registers. - vld1_f64⚠AArch64 and
neon
Load multiple single-element structures to one, two, three, or four registers. - vld1_f64_x2⚠AArch64 and
neon
Load multiple single-element structures to one, two, three, or four registers - vld1_f64_x3⚠AArch64 and
neon
Load multiple single-element structures to one, two, three, or four registers - vld1_f64_x4⚠AArch64 and
neon
Load multiple single-element structures to one, two, three, or four registers - vld1_lane_f64⚠AArch64 and
neon
Load one single-element structure to one lane of one register. - vld1_p8⚠AArch64 and
neon
Load multiple single-element structures to one, two, three, or four registers. - vld1_p16⚠AArch64 and
neon
Load multiple single-element structures to one, two, three, or four registers. - vld1_p64⚠AArch64 and
neon,aes
Load multiple single-element structures to one, two, three, or four registers. - vld1_s8⚠AArch64 and
neon
Load multiple single-element structures to one, two, three, or four registers. - vld1_s16⚠AArch64 and
neon
Load multiple single-element structures to one, two, three, or four registers. - vld1_s32⚠AArch64 and
neon
Load multiple single-element structures to one, two, three, or four registers. - vld1_s64⚠AArch64 and
neon
Load multiple single-element structures to one, two, three, or four registers. - vld1_u8⚠AArch64 and
neon
Load multiple single-element structures to one, two, three, or four registers. - vld1_u16⚠AArch64 and
neon
Load multiple single-element structures to one, two, three, or four registers. - vld1_u32⚠AArch64 and
neon
Load multiple single-element structures to one, two, three, or four registers. - vld1_u64⚠AArch64 and
neon
Load multiple single-element structures to one, two, three, or four registers. - vld1q_dup_f64⚠AArch64 and
neon
Load multiple single-element structures to one, two, three, or four registers - vld1q_f32⚠AArch64 and
neon
Load multiple single-element structures to one, two, three, or four registers. - vld1q_f64⚠AArch64 and
neon
Load multiple single-element structures to one, two, three, or four registers. - vld1q_f64_x2⚠AArch64 and
neon
Load multiple single-element structures to one, two, three, or four registers - vld1q_f64_x3⚠AArch64 and
neon
Load multiple single-element structures to one, two, three, or four registers - vld1q_f64_x4⚠AArch64 and
neon
Load multiple single-element structures to one, two, three, or four registers - vld1q_lane_f64⚠AArch64 and
neon
Load one single-element structure to one lane of one register. - vld1q_p8⚠AArch64 and
neon
Load multiple single-element structures to one, two, three, or four registers. - vld1q_p16⚠AArch64 and
neon
Load multiple single-element structures to one, two, three, or four registers. - vld1q_p64⚠AArch64 and
neon,aes
Load multiple single-element structures to one, two, three, or four registers. - vld1q_s8⚠AArch64 and
neon
Load multiple single-element structures to one, two, three, or four registers. - vld1q_s16⚠AArch64 and
neon
Load multiple single-element structures to one, two, three, or four registers. - vld1q_s32⚠AArch64 and
neon
Load multiple single-element structures to one, two, three, or four registers. - vld1q_s64⚠AArch64 and
neon
Load multiple single-element structures to one, two, three, or four registers. - vld1q_u8⚠AArch64 and
neon
Load multiple single-element structures to one, two, three, or four registers. - vld1q_u16⚠AArch64 and
neon
Load multiple single-element structures to one, two, three, or four registers. - vld1q_u32⚠AArch64 and
neon
Load multiple single-element structures to one, two, three, or four registers. - vld1q_u64⚠AArch64 and
neon
Load multiple single-element structures to one, two, three, or four registers. - vld2_dup_f64⚠AArch64 and
neon
Load single 2-element structure and replicate to all lanes of two registers - vld2_f64⚠AArch64 and
neon
Load multiple 2-element structures to two registers - vld2_lane_f64⚠AArch64 and
neon
Load multiple 2-element structures to two registers - vld2_lane_p64⚠AArch64 and
neon,aes
Load multiple 2-element structures to two registers - vld2_lane_s64⚠AArch64 and
neon
Load multiple 2-element structures to two registers - vld2_lane_u64⚠AArch64 and
neon
Load multiple 2-element structures to two registers - vld2q_dup_f64⚠AArch64 and
neon
Load single 2-element structure and replicate to all lanes of two registers - vld2q_dup_p64⚠AArch64 and
neon,aes
Load single 2-element structure and replicate to all lanes of two registers - vld2q_dup_s64⚠AArch64 and
neon
Load single 2-element structure and replicate to all lanes of two registers - vld2q_dup_u64⚠AArch64 and
neon
Load single 2-element structure and replicate to all lanes of two registers - vld2q_f64⚠AArch64 and
neon
Load multiple 2-element structures to two registers - vld2q_lane_f64⚠AArch64 and
neon
Load multiple 2-element structures to two registers - vld2q_lane_p8⚠AArch64 and
neon
Load multiple 2-element structures to two registers - vld2q_lane_p64⚠AArch64 and
neon,aes
Load multiple 2-element structures to two registers - vld2q_lane_s8⚠AArch64 and
neon
Load multiple 2-element structures to two registers - vld2q_lane_s64⚠AArch64 and
neon
Load multiple 2-element structures to two registers - vld2q_lane_u8⚠AArch64 and
neon
Load multiple 2-element structures to two registers - vld2q_lane_u64⚠AArch64 and
neon
Load multiple 2-element structures to two registers - vld2q_p64⚠AArch64 and
neon,aes
Load multiple 2-element structures to two registers - vld2q_s64⚠AArch64 and
neon
Load multiple 2-element structures to two registers - vld2q_u64⚠AArch64 and
neon
Load multiple 2-element structures to two registers - vld3_dup_f64⚠AArch64 and
neon
Load single 3-element structure and replicate to all lanes of three registers - vld3_f64⚠AArch64 and
neon
Load multiple 3-element structures to three registers - vld3_lane_f64⚠AArch64 and
neon
Load multiple 3-element structures to three registers - vld3_lane_p64⚠AArch64 and
neon,aes
Load multiple 3-element structures to three registers - vld3_lane_s64⚠AArch64 and
neon
Load multiple 3-element structures to two registers - vld3_lane_u64⚠AArch64 and
neon
Load multiple 3-element structures to three registers - vld3q_dup_f64⚠AArch64 and
neon
Load single 3-element structure and replicate to all lanes of three registers - vld3q_dup_p64⚠AArch64 and
neon,aes
Load single 3-element structure and replicate to all lanes of three registers - vld3q_dup_s64⚠AArch64 and
neon
Load single 3-element structure and replicate to all lanes of three registers - vld3q_dup_u64⚠AArch64 and
neon
Load single 3-element structure and replicate to all lanes of three registers - vld3q_f64⚠AArch64 and
neon
Load multiple 3-element structures to three registers - vld3q_lane_f64⚠AArch64 and
neon
Load multiple 3-element structures to three registers - vld3q_lane_p8⚠AArch64 and
neon
Load multiple 3-element structures to three registers - vld3q_lane_p64⚠AArch64 and
neon,aes
Load multiple 3-element structures to three registers - vld3q_lane_s8⚠AArch64 and
neon
Load multiple 3-element structures to two registers - vld3q_lane_s64⚠AArch64 and
neon
Load multiple 3-element structures to two registers - vld3q_lane_u8⚠AArch64 and
neon
Load multiple 3-element structures to three registers - vld3q_lane_u64⚠AArch64 and
neon
Load multiple 3-element structures to three registers - vld3q_p64⚠AArch64 and
neon,aes
Load multiple 3-element structures to three registers - vld3q_s64⚠AArch64 and
neon
Load multiple 3-element structures to three registers - vld3q_u64⚠AArch64 and
neon
Load multiple 3-element structures to three registers - vld4_dup_f64⚠AArch64 and
neon
Load single 4-element structure and replicate to all lanes of four registers - vld4_f64⚠AArch64 and
neon
Load multiple 4-element structures to four registers - vld4_lane_f64⚠AArch64 and
neon
Load multiple 4-element structures to four registers - vld4_lane_p64⚠AArch64 and
neon,aes
Load multiple 4-element structures to four registers - vld4_lane_s64⚠AArch64 and
neon
Load multiple 4-element structures to four registers - vld4_lane_u64⚠AArch64 and
neon
Load multiple 4-element structures to four registers - vld4q_dup_f64⚠AArch64 and
neon
Load single 4-element structure and replicate to all lanes of four registers - vld4q_dup_p64⚠AArch64 and
neon,aes
Load single 4-element structure and replicate to all lanes of four registers - vld4q_dup_s64⚠AArch64 and
neon
Load single 4-element structure and replicate to all lanes of four registers - vld4q_dup_u64⚠AArch64 and
neon
Load single 4-element structure and replicate to all lanes of four registers - vld4q_f64⚠AArch64 and
neon
Load multiple 4-element structures to four registers - vld4q_lane_f64⚠AArch64 and
neon
Load multiple 4-element structures to four registers - vld4q_lane_p8⚠AArch64 and
neon
Load multiple 4-element structures to four registers - vld4q_lane_p64⚠AArch64 and
neon,aes
Load multiple 4-element structures to four registers - vld4q_lane_s8⚠AArch64 and
neon
Load multiple 4-element structures to four registers - vld4q_lane_s64⚠AArch64 and
neon
Load multiple 4-element structures to four registers - vld4q_lane_u8⚠AArch64 and
neon
Load multiple 4-element structures to four registers - vld4q_lane_u64⚠AArch64 and
neon
Load multiple 4-element structures to four registers - vld4q_p64⚠AArch64 and
neon,aes
Load multiple 4-element structures to four registers - vld4q_s64⚠AArch64 and
neon
Load multiple 4-element structures to four registers - vld4q_u64⚠AArch64 and
neon
Load multiple 4-element structures to four registers - vmax_f64⚠AArch64 and
neon
Maximum (vector) - vmaxnm_f64⚠AArch64 and
neon
Floating-point Maximum Number (vector) - vmaxnmq_f64⚠AArch64 and
neon
Floating-point Maximum Number (vector) - vmaxnmv_f32⚠AArch64 and
neon
Floating-point maximum number across vector - vmaxnmvq_f32⚠AArch64 and
neon
Floating-point maximum number across vector - vmaxnmvq_f64⚠AArch64 and
neon
Floating-point maximum number across vector - vmaxq_f64⚠AArch64 and
neon
Maximum (vector) - vmaxv_f32⚠AArch64 and
neon
Horizontal vector max. - vmaxv_s8⚠AArch64 and
neon
Horizontal vector max. - vmaxv_s16⚠AArch64 and
neon
Horizontal vector max. - vmaxv_s32⚠AArch64 and
neon
Horizontal vector max. - vmaxv_u8⚠AArch64 and
neon
Horizontal vector max. - vmaxv_u16⚠AArch64 and
neon
Horizontal vector max. - vmaxv_u32⚠AArch64 and
neon
Horizontal vector max. - vmaxvq_f32⚠AArch64 and
neon
Horizontal vector max. - vmaxvq_f64⚠AArch64 and
neon
Horizontal vector max. - vmaxvq_s8⚠AArch64 and
neon
Horizontal vector max. - vmaxvq_s16⚠AArch64 and
neon
Horizontal vector max. - vmaxvq_s32⚠AArch64 and
neon
Horizontal vector max. - vmaxvq_u8⚠AArch64 and
neon
Horizontal vector max. - vmaxvq_u16⚠AArch64 and
neon
Horizontal vector max. - vmaxvq_u32⚠AArch64 and
neon
Horizontal vector max. - vmin_f64⚠AArch64 and
neon
Minimum (vector) - vminnm_f64⚠AArch64 and
neon
Floating-point Minimum Number (vector) - vminnmq_f64⚠AArch64 and
neon
Floating-point Minimum Number (vector) - vminnmv_f32⚠AArch64 and
neon
Floating-point minimum number across vector - vminnmvq_f32⚠AArch64 and
neon
Floating-point minimum number across vector - vminnmvq_f64⚠AArch64 and
neon
Floating-point minimum number across vector - vminq_f64⚠AArch64 and
neon
Minimum (vector) - vminv_f32⚠AArch64 and
neon
Horizontal vector min. - vminv_s8⚠AArch64 and
neon
Horizontal vector min. - vminv_s16⚠AArch64 and
neon
Horizontal vector min. - vminv_s32⚠AArch64 and
neon
Horizontal vector min. - vminv_u8⚠AArch64 and
neon
Horizontal vector min. - vminv_u16⚠AArch64 and
neon
Horizontal vector min. - vminv_u32⚠AArch64 and
neon
Horizontal vector min. - vminvq_f32⚠AArch64 and
neon
Horizontal vector min. - vminvq_f64⚠AArch64 and
neon
Horizontal vector min. - vminvq_s8⚠AArch64 and
neon
Horizontal vector min. - vminvq_s16⚠AArch64 and
neon
Horizontal vector min. - vminvq_s32⚠AArch64 and
neon
Horizontal vector min. - vminvq_u8⚠AArch64 and
neon
Horizontal vector min. - vminvq_u16⚠AArch64 and
neon
Horizontal vector min. - vminvq_u32⚠AArch64 and
neon
Horizontal vector min. - vmla_f64⚠AArch64 and
neon
Floating-point multiply-add to accumulator - vmlal_high_lane_s16⚠AArch64 and
neon
Multiply-add long - vmlal_high_lane_s32⚠AArch64 and
neon
Multiply-add long - vmlal_high_lane_u16⚠AArch64 and
neon
Multiply-add long - vmlal_high_lane_u32⚠AArch64 and
neon
Multiply-add long - vmlal_high_laneq_s16⚠AArch64 and
neon
Multiply-add long - vmlal_high_laneq_s32⚠AArch64 and
neon
Multiply-add long - vmlal_high_laneq_u16⚠AArch64 and
neon
Multiply-add long - vmlal_high_laneq_u32⚠AArch64 and
neon
Multiply-add long - vmlal_high_n_s16⚠AArch64 and
neon
Multiply-add long - vmlal_high_n_s32⚠AArch64 and
neon
Multiply-add long - vmlal_high_n_u16⚠AArch64 and
neon
Multiply-add long - vmlal_high_n_u32⚠AArch64 and
neon
Multiply-add long - vmlal_high_s8⚠AArch64 and
neon
Signed multiply-add long - vmlal_high_s16⚠AArch64 and
neon
Signed multiply-add long - vmlal_high_s32⚠AArch64 and
neon
Signed multiply-add long - vmlal_high_u8⚠AArch64 and
neon
Unsigned multiply-add long - vmlal_high_u16⚠AArch64 and
neon
Unsigned multiply-add long - vmlal_high_u32⚠AArch64 and
neon
Unsigned multiply-add long - vmlaq_f64⚠AArch64 and
neon
Floating-point multiply-add to accumulator - vmls_f64⚠AArch64 and
neon
Floating-point multiply-subtract from accumulator - vmlsl_high_lane_s16⚠AArch64 and
neon
Multiply-subtract long - vmlsl_high_lane_s32⚠AArch64 and
neon
Multiply-subtract long - vmlsl_high_lane_u16⚠AArch64 and
neon
Multiply-subtract long - vmlsl_high_lane_u32⚠AArch64 and
neon
Multiply-subtract long - vmlsl_high_laneq_s16⚠AArch64 and
neon
Multiply-subtract long - vmlsl_high_laneq_s32⚠AArch64 and
neon
Multiply-subtract long - vmlsl_high_laneq_u16⚠AArch64 and
neon
Multiply-subtract long - vmlsl_high_laneq_u32⚠AArch64 and
neon
Multiply-subtract long - vmlsl_high_n_s16⚠AArch64 and
neon
Multiply-subtract long - vmlsl_high_n_s32⚠AArch64 and
neon
Multiply-subtract long - vmlsl_high_n_u16⚠AArch64 and
neon
Multiply-subtract long - vmlsl_high_n_u32⚠AArch64 and
neon
Multiply-subtract long - vmlsl_high_s8⚠AArch64 and
neon
Signed multiply-subtract long - vmlsl_high_s16⚠AArch64 and
neon
Signed multiply-subtract long - vmlsl_high_s32⚠AArch64 and
neon
Signed multiply-subtract long - vmlsl_high_u8⚠AArch64 and
neon
Unsigned multiply-subtract long - vmlsl_high_u16⚠AArch64 and
neon
Unsigned multiply-subtract long - vmlsl_high_u32⚠AArch64 and
neon
Unsigned multiply-subtract long - vmlsq_f64⚠AArch64 and
neon
Floating-point multiply-subtract from accumulator - vmov_n_f64⚠AArch64 and
neon
Duplicate vector element to vector or scalar - vmov_n_p64⚠AArch64 and
neon
Duplicate vector element to vector or scalar - vmovl_high_s8⚠AArch64 and
neon
Vector move - vmovl_high_s16⚠AArch64 and
neon
Vector move - vmovl_high_s32⚠AArch64 and
neon
Vector move - vmovl_high_u8⚠AArch64 and
neon
Vector move - vmovl_high_u16⚠AArch64 and
neon
Vector move - vmovl_high_u32⚠AArch64 and
neon
Vector move - vmovn_high_s16⚠AArch64 and
neon
Extract narrow - vmovn_high_s32⚠AArch64 and
neon
Extract narrow - vmovn_high_s64⚠AArch64 and
neon
Extract narrow - vmovn_high_u16⚠AArch64 and
neon
Extract narrow - vmovn_high_u32⚠AArch64 and
neon
Extract narrow - vmovn_high_u64⚠AArch64 and
neon
Extract narrow - vmovq_n_f64⚠AArch64 and
neon
Duplicate vector element to vector or scalar - vmovq_n_p64⚠AArch64 and
neon
Duplicate vector element to vector or scalar - vmul_f64⚠AArch64 and
neon
Multiply - vmul_lane_f64⚠AArch64 and
neon
Floating-point multiply - vmul_laneq_f64⚠AArch64 and
neon
Floating-point multiply - vmul_n_f64⚠AArch64 and
neon
Vector multiply by scalar - vmuld_lane_f64⚠AArch64 and
neon
Floating-point multiply - vmuld_laneq_f64⚠AArch64 and
neon
Floating-point multiply - vmull_high_lane_s16⚠AArch64 and
neon
Multiply long - vmull_high_lane_s32⚠AArch64 and
neon
Multiply long - vmull_high_lane_u16⚠AArch64 and
neon
Multiply long - vmull_high_lane_u32⚠AArch64 and
neon
Multiply long - vmull_high_laneq_s16⚠AArch64 and
neon
Multiply long - vmull_high_laneq_s32⚠AArch64 and
neon
Multiply long - vmull_high_laneq_u16⚠AArch64 and
neon
Multiply long - vmull_high_laneq_u32⚠AArch64 and
neon
Multiply long - vmull_high_n_s16⚠AArch64 and
neon
Multiply long - vmull_high_n_s32⚠AArch64 and
neon
Multiply long - vmull_high_n_u16⚠AArch64 and
neon
Multiply long - vmull_high_n_u32⚠AArch64 and
neon
Multiply long - vmull_high_p8⚠AArch64 and
neon
Polynomial multiply long - vmull_high_p64⚠AArch64 and
neon,aes
Polynomial multiply long - vmull_high_s8⚠AArch64 and
neon
Signed multiply long - vmull_high_s16⚠AArch64 and
neon
Signed multiply long - vmull_high_s32⚠AArch64 and
neon
Signed multiply long - vmull_high_u8⚠AArch64 and
neon
Unsigned multiply long - vmull_high_u16⚠AArch64 and
neon
Unsigned multiply long - vmull_high_u32⚠AArch64 and
neon
Unsigned multiply long - vmull_p64⚠AArch64 and
neon,aes
Polynomial multiply long - vmulq_f64⚠AArch64 and
neon
Multiply - vmulq_lane_f64⚠AArch64 and
neon
Floating-point multiply - vmulq_laneq_f64⚠AArch64 and
neon
Floating-point multiply - vmulq_n_f64⚠AArch64 and
neon
Vector multiply by scalar - vmuls_lane_f32⚠AArch64 and
neon
Floating-point multiply - vmuls_laneq_f32⚠AArch64 and
neon
Floating-point multiply - vmulx_f32⚠AArch64 and
neon
Floating-point multiply extended - vmulx_f64⚠AArch64 and
neon
Floating-point multiply extended - vmulx_lane_f32⚠AArch64 and
neon
Floating-point multiply extended - vmulx_lane_f64⚠AArch64 and
neon
Floating-point multiply extended - vmulx_laneq_f32⚠AArch64 and
neon
Floating-point multiply extended - vmulx_laneq_f64⚠AArch64 and
neon
Floating-point multiply extended - vmulxd_f64⚠AArch64 and
neon
Floating-point multiply extended - vmulxd_lane_f64⚠AArch64 and
neon
Floating-point multiply extended - vmulxd_laneq_f64⚠AArch64 and
neon
Floating-point multiply extended - vmulxq_f32⚠AArch64 and
neon
Floating-point multiply extended - vmulxq_f64⚠AArch64 and
neon
Floating-point multiply extended - vmulxq_lane_f32⚠AArch64 and
neon
Floating-point multiply extended - vmulxq_lane_f64⚠AArch64 and
neon
Floating-point multiply extended - vmulxq_laneq_f32⚠AArch64 and
neon
Floating-point multiply extended - vmulxq_laneq_f64⚠AArch64 and
neon
Floating-point multiply extended - vmulxs_f32⚠AArch64 and
neon
Floating-point multiply extended - vmulxs_lane_f32⚠AArch64 and
neon
Floating-point multiply extended - vmulxs_laneq_f32⚠AArch64 and
neon
Floating-point multiply extended - vneg_f64⚠AArch64 and
neon
Negate - vneg_s64⚠AArch64 and
neon
Negate - vnegd_s64⚠AArch64 and
neon
Negate - vnegq_f64⚠AArch64 and
neon
Negate - vnegq_s64⚠AArch64 and
neon
Negate - vpaddd_f64⚠AArch64 and
neon
Floating-point add pairwise - vpaddd_s64⚠AArch64 and
neon
Add pairwise - vpaddd_u64⚠AArch64 and
neon
Add pairwise - vpaddq_f32⚠AArch64 and
neon
Floating-point add pairwise - vpaddq_f64⚠AArch64 and
neon
Floating-point add pairwise - vpaddq_s8⚠AArch64 and
neon
Add pairwise - vpaddq_s16⚠AArch64 and
neon
Add pairwise - vpaddq_s32⚠AArch64 and
neon
Add pairwise - vpaddq_s64⚠AArch64 and
neon
Add pairwise - vpaddq_u8⚠AArch64 and
neon
Add pairwise - vpaddq_u16⚠AArch64 and
neon
Add pairwise - vpaddq_u32⚠AArch64 and
neon
Add pairwise - vpaddq_u64⚠AArch64 and
neon
Add pairwise - vpadds_f32⚠AArch64 and
neon
Floating-point add pairwise - vpmaxnm_f32⚠AArch64 and
neon
Floating-point Maximum Number Pairwise (vector). - vpmaxnmq_f32⚠AArch64 and
neon
Floating-point Maximum Number Pairwise (vector). - vpmaxnmq_f64⚠AArch64 and
neon
Floating-point Maximum Number Pairwise (vector). - vpmaxnmqd_f64⚠AArch64 and
neon
Floating-point maximum number pairwise - vpmaxnms_f32⚠AArch64 and
neon
Floating-point maximum number pairwise - vpmaxq_f32⚠AArch64 and
neon
Folding maximum of adjacent pairs - vpmaxq_f64⚠AArch64 and
neon
Folding maximum of adjacent pairs - vpmaxq_s8⚠AArch64 and
neon
Folding maximum of adjacent pairs - vpmaxq_s16⚠AArch64 and
neon
Folding maximum of adjacent pairs - vpmaxq_s32⚠AArch64 and
neon
Folding maximum of adjacent pairs - vpmaxq_u8⚠AArch64 and
neon
Folding maximum of adjacent pairs - vpmaxq_u16⚠AArch64 and
neon
Folding maximum of adjacent pairs - vpmaxq_u32⚠AArch64 and
neon
Folding maximum of adjacent pairs - vpmaxqd_f64⚠AArch64 and
neon
Floating-point maximum pairwise - vpmaxs_f32⚠AArch64 and
neon
Floating-point maximum pairwise - vpminnm_f32⚠AArch64 and
neon
Floating-point Minimum Number Pairwise (vector). - vpminnmq_f32⚠AArch64 and
neon
Floating-point Minimum Number Pairwise (vector). - vpminnmq_f64⚠AArch64 and
neon
Floating-point Minimum Number Pairwise (vector). - vpminnmqd_f64⚠AArch64 and
neon
Floating-point minimum number pairwise - vpminnms_f32⚠AArch64 and
neon
Floating-point minimum number pairwise - vpminq_f32⚠AArch64 and
neon
Folding minimum of adjacent pairs - vpminq_f64⚠AArch64 and
neon
Folding minimum of adjacent pairs - vpminq_s8⚠AArch64 and
neon
Folding minimum of adjacent pairs - vpminq_s16⚠AArch64 and
neon
Folding minimum of adjacent pairs - vpminq_s32⚠AArch64 and
neon
Folding minimum of adjacent pairs - vpminq_u8⚠AArch64 and
neon
Folding minimum of adjacent pairs - vpminq_u16⚠AArch64 and
neon
Folding minimum of adjacent pairs - vpminq_u32⚠AArch64 and
neon
Folding minimum of adjacent pairs - vpminqd_f64⚠AArch64 and
neon
Floating-point minimum pairwise - vpmins_f32⚠AArch64 and
neon
Floating-point minimum pairwise - vqabs_s64⚠AArch64 and
neon
Signed saturating Absolute value - vqabsb_s8⚠AArch64 and
neon
Signed saturating absolute value - vqabsd_s64⚠AArch64 and
neon
Signed saturating absolute value - vqabsh_s16⚠AArch64 and
neon
Signed saturating absolute value - vqabsq_s64⚠AArch64 and
neon
Signed saturating Absolute value - vqabss_s32⚠AArch64 and
neon
Signed saturating absolute value - vqaddb_s8⚠AArch64 and
neon
Saturating add - vqaddb_u8⚠AArch64 and
neon
Saturating add - vqaddd_s64⚠AArch64 and
neon
Saturating add - vqaddd_u64⚠AArch64 and
neon
Saturating add - vqaddh_s16⚠AArch64 and
neon
Saturating add - vqaddh_u16⚠AArch64 and
neon
Saturating add - vqadds_s32⚠AArch64 and
neon
Saturating add - vqadds_u32⚠AArch64 and
neon
Saturating add - vqdmlal_high_lane_s16⚠AArch64 and
neon
Signed saturating doubling multiply-add long - vqdmlal_high_lane_s32⚠AArch64 and
neon
Signed saturating doubling multiply-add long - vqdmlal_high_laneq_s16⚠AArch64 and
neon
Signed saturating doubling multiply-add long - vqdmlal_high_laneq_s32⚠AArch64 and
neon
Signed saturating doubling multiply-add long - vqdmlal_high_n_s16⚠AArch64 and
neon
Signed saturating doubling multiply-add long - vqdmlal_high_n_s32⚠AArch64 and
neon
Signed saturating doubling multiply-add long - vqdmlal_high_s16⚠AArch64 and
neon
Signed saturating doubling multiply-add long - vqdmlal_high_s32⚠AArch64 and
neon
Signed saturating doubling multiply-add long - vqdmlal_laneq_s16⚠AArch64 and
neon
Vector widening saturating doubling multiply accumulate with scalar - vqdmlal_laneq_s32⚠AArch64 and
neon
Vector widening saturating doubling multiply accumulate with scalar - vqdmlalh_lane_s16⚠AArch64 and
neon
Signed saturating doubling multiply-add long - vqdmlalh_laneq_s16⚠AArch64 and
neon
Signed saturating doubling multiply-add long - vqdmlalh_s16⚠AArch64 and
neon
Signed saturating doubling multiply-add long - vqdmlals_lane_s32⚠AArch64 and
neon
Signed saturating doubling multiply-add long - vqdmlals_laneq_s32⚠AArch64 and
neon
Signed saturating doubling multiply-add long - vqdmlals_s32⚠AArch64 and
neon
Signed saturating doubling multiply-add long - vqdmlsl_high_lane_s16⚠AArch64 and
neon
Signed saturating doubling multiply-subtract long - vqdmlsl_high_lane_s32⚠AArch64 and
neon
Signed saturating doubling multiply-subtract long - vqdmlsl_high_laneq_s16⚠AArch64 and
neon
Signed saturating doubling multiply-subtract long - vqdmlsl_high_laneq_s32⚠AArch64 and
neon
Signed saturating doubling multiply-subtract long - vqdmlsl_high_n_s16⚠AArch64 and
neon
Signed saturating doubling multiply-subtract long - vqdmlsl_high_n_s32⚠AArch64 and
neon
Signed saturating doubling multiply-subtract long - vqdmlsl_high_s16⚠AArch64 and
neon
Signed saturating doubling multiply-subtract long - vqdmlsl_high_s32⚠AArch64 and
neon
Signed saturating doubling multiply-subtract long - vqdmlsl_laneq_s16⚠AArch64 and
neon
Vector widening saturating doubling multiply subtract with scalar - vqdmlsl_laneq_s32⚠AArch64 and
neon
Vector widening saturating doubling multiply subtract with scalar - vqdmlslh_lane_s16⚠AArch64 and
neon
Signed saturating doubling multiply-subtract long - vqdmlslh_laneq_s16⚠AArch64 and
neon
Signed saturating doubling multiply-subtract long - vqdmlslh_s16⚠AArch64 and
neon
Signed saturating doubling multiply-subtract long - vqdmlsls_lane_s32⚠AArch64 and
neon
Signed saturating doubling multiply-subtract long - vqdmlsls_laneq_s32⚠AArch64 and
neon
Signed saturating doubling multiply-subtract long - vqdmlsls_s32⚠AArch64 and
neon
Signed saturating doubling multiply-subtract long - vqdmulh_lane_s16⚠AArch64 and
neon
Vector saturating doubling multiply high by scalar - vqdmulh_lane_s32⚠AArch64 and
neon
Vector saturating doubling multiply high by scalar - vqdmulhh_lane_s16⚠AArch64 and
neon
Signed saturating doubling multiply returning high half - vqdmulhh_laneq_s16⚠AArch64 and
neon
Signed saturating doubling multiply returning high half - vqdmulhh_s16⚠AArch64 and
neon
Signed saturating doubling multiply returning high half - vqdmulhq_lane_s16⚠AArch64 and
neon
Vector saturating doubling multiply high by scalar - vqdmulhq_lane_s32⚠AArch64 and
neon
Vector saturating doubling multiply high by scalar - vqdmulhs_lane_s32⚠AArch64 and
neon
Signed saturating doubling multiply returning high half - vqdmulhs_laneq_s32⚠AArch64 and
neon
Signed saturating doubling multiply returning high half - vqdmulhs_s32⚠AArch64 and
neon
Signed saturating doubling multiply returning high half - vqdmull_high_lane_s16⚠AArch64 and
neon
Signed saturating doubling multiply long - vqdmull_high_lane_s32⚠AArch64 and
neon
Signed saturating doubling multiply long - vqdmull_high_laneq_s16⚠AArch64 and
neon
Signed saturating doubling multiply long - vqdmull_high_laneq_s32⚠AArch64 and
neon
Signed saturating doubling multiply long - vqdmull_high_n_s16⚠AArch64 and
neon
Signed saturating doubling multiply long - vqdmull_high_n_s32⚠AArch64 and
neon
Signed saturating doubling multiply long - vqdmull_high_s16⚠AArch64 and
neon
Signed saturating doubling multiply long - vqdmull_high_s32⚠AArch64 and
neon
Signed saturating doubling multiply long - vqdmull_laneq_s16⚠AArch64 and
neon
Vector saturating doubling long multiply by scalar - vqdmull_laneq_s32⚠AArch64 and
neon
Vector saturating doubling long multiply by scalar - vqdmullh_lane_s16⚠AArch64 and
neon
Signed saturating doubling multiply long - vqdmullh_laneq_s16⚠AArch64 and
neon
Signed saturating doubling multiply long - vqdmullh_s16⚠AArch64 and
neon
Signed saturating doubling multiply long - vqdmulls_lane_s32⚠AArch64 and
neon
Signed saturating doubling multiply long - vqdmulls_laneq_s32⚠AArch64 and
neon
Signed saturating doubling multiply long - vqdmulls_s32⚠AArch64 and
neon
Signed saturating doubling multiply long - vqmovn_high_s16⚠AArch64 and
neon
Signed saturating extract narrow - vqmovn_high_s32⚠AArch64 and
neon
Signed saturating extract narrow - vqmovn_high_s64⚠AArch64 and
neon
Signed saturating extract narrow - vqmovn_high_u16⚠AArch64 and
neon
Signed saturating extract narrow - vqmovn_high_u32⚠AArch64 and
neon
Signed saturating extract narrow - vqmovn_high_u64⚠AArch64 and
neon
Signed saturating extract narrow - vqmovnd_s64⚠AArch64 and
neon
Saturating extract narrow - vqmovnd_u64⚠AArch64 and
neon
Saturating extract narrow - vqmovnh_s16⚠AArch64 and
neon
Saturating extract narrow - vqmovnh_u16⚠AArch64 and
neon
Saturating extract narrow - vqmovns_s32⚠AArch64 and
neon
Saturating extract narrow - vqmovns_u32⚠AArch64 and
neon
Saturating extract narrow - vqmovun_high_s16⚠AArch64 and
neon
Signed saturating extract unsigned narrow - vqmovun_high_s32⚠AArch64 and
neon
Signed saturating extract unsigned narrow - vqmovun_high_s64⚠AArch64 and
neon
Signed saturating extract unsigned narrow - vqmovund_s64⚠AArch64 and
neon
Signed saturating extract unsigned narrow - vqmovunh_s16⚠AArch64 and
neon
Signed saturating extract unsigned narrow - vqmovuns_s32⚠AArch64 and
neon
Signed saturating extract unsigned narrow - vqneg_s64⚠AArch64 and
neon
Signed saturating negate - vqnegb_s8⚠AArch64 and
neon
Signed saturating negate - vqnegd_s64⚠AArch64 and
neon
Signed saturating negate - vqnegh_s16⚠AArch64 and
neon
Signed saturating negate - vqnegq_s64⚠AArch64 and
neon
Signed saturating negate - vqnegs_s32⚠AArch64 and
neon
Signed saturating negate - vqrdmlah_lane_s16⚠AArch64 and
rdm
Signed saturating rounding doubling multiply accumulate returning high half - vqrdmlah_lane_s32⚠AArch64 and
rdm
Signed saturating rounding doubling multiply accumulate returning high half - vqrdmlah_laneq_s16⚠AArch64 and
rdm
Signed saturating rounding doubling multiply accumulate returning high half - vqrdmlah_laneq_s32⚠AArch64 and
rdm
Signed saturating rounding doubling multiply accumulate returning high half - vqrdmlah_s16⚠AArch64 and
rdm
Signed saturating rounding doubling multiply accumulate returning high half - vqrdmlah_s32⚠AArch64 and
rdm
Signed saturating rounding doubling multiply accumulate returning high half - vqrdmlahh_lane_s16⚠AArch64 and
rdm
Signed saturating rounding doubling multiply accumulate returning high half - vqrdmlahh_laneq_s16⚠AArch64 and
rdm
Signed saturating rounding doubling multiply accumulate returning high half - vqrdmlahh_s16⚠AArch64 and
rdm
Signed saturating rounding doubling multiply accumulate returning high half - vqrdmlahq_lane_s16⚠AArch64 and
rdm
Signed saturating rounding doubling multiply accumulate returning high half - vqrdmlahq_lane_s32⚠AArch64 and
rdm
Signed saturating rounding doubling multiply accumulate returning high half - vqrdmlahq_laneq_s16⚠AArch64 and
rdm
Signed saturating rounding doubling multiply accumulate returning high half - vqrdmlahq_laneq_s32⚠AArch64 and
rdm
Signed saturating rounding doubling multiply accumulate returning high half - vqrdmlahq_s16⚠AArch64 and
rdm
Signed saturating rounding doubling multiply accumulate returning high half - vqrdmlahq_s32⚠AArch64 and
rdm
Signed saturating rounding doubling multiply accumulate returning high half - vqrdmlahs_lane_s32⚠AArch64 and
rdm
Signed saturating rounding doubling multiply accumulate returning high half - vqrdmlahs_laneq_s32⚠AArch64 and
rdm
Signed saturating rounding doubling multiply accumulate returning high half - vqrdmlahs_s32⚠AArch64 and
rdm
Signed saturating rounding doubling multiply accumulate returning high half - vqrdmlsh_lane_s16⚠AArch64 and
rdm
Signed saturating rounding doubling multiply subtract returning high half - vqrdmlsh_lane_s32⚠AArch64 and
rdm
Signed saturating rounding doubling multiply subtract returning high half - vqrdmlsh_laneq_s16⚠AArch64 and
rdm
Signed saturating rounding doubling multiply subtract returning high half - vqrdmlsh_laneq_s32⚠AArch64 and
rdm
Signed saturating rounding doubling multiply subtract returning high half - vqrdmlsh_s16⚠AArch64 and
rdm
Signed saturating rounding doubling multiply subtract returning high half - vqrdmlsh_s32⚠AArch64 and
rdm
Signed saturating rounding doubling multiply subtract returning high half - vqrdmlshh_lane_s16⚠AArch64 and
rdm
Signed saturating rounding doubling multiply subtract returning high half - vqrdmlshh_laneq_s16⚠AArch64 and
rdm
Signed saturating rounding doubling multiply subtract returning high half - vqrdmlshh_s16⚠AArch64 and
rdm
Signed saturating rounding doubling multiply subtract returning high half - vqrdmlshq_lane_s16⚠AArch64 and
rdm
Signed saturating rounding doubling multiply subtract returning high half - vqrdmlshq_lane_s32⚠AArch64 and
rdm
Signed saturating rounding doubling multiply subtract returning high half - vqrdmlshq_laneq_s16⚠AArch64 and
rdm
Signed saturating rounding doubling multiply subtract returning high half - vqrdmlshq_laneq_s32⚠AArch64 and
rdm
Signed saturating rounding doubling multiply subtract returning high half - vqrdmlshq_s16⚠AArch64 and
rdm
Signed saturating rounding doubling multiply subtract returning high half - vqrdmlshq_s32⚠AArch64 and
rdm
Signed saturating rounding doubling multiply subtract returning high half - vqrdmlshs_lane_s32⚠AArch64 and
rdm
Signed saturating rounding doubling multiply subtract returning high half - vqrdmlshs_laneq_s32⚠AArch64 and
rdm
Signed saturating rounding doubling multiply subtract returning high half - vqrdmlshs_s32⚠AArch64 and
rdm
Signed saturating rounding doubling multiply subtract returning high half - vqrdmulhh_lane_s16⚠AArch64 and
neon
Signed saturating rounding doubling multiply returning high half - vqrdmulhh_laneq_s16⚠AArch64 and
neon
Signed saturating rounding doubling multiply returning high half - vqrdmulhh_s16⚠AArch64 and
neon
Signed saturating rounding doubling multiply returning high half - vqrdmulhs_lane_s32⚠AArch64 and
neon
Signed saturating rounding doubling multiply returning high half - vqrdmulhs_laneq_s32⚠AArch64 and
neon
Signed saturating rounding doubling multiply returning high half - vqrdmulhs_s32⚠AArch64 and
neon
Signed saturating rounding doubling multiply returning high half - vqrshlb_s8⚠AArch64 and
neon
Signed saturating rounding shift left - vqrshlb_u8⚠AArch64 and
neon
Unsigned signed saturating rounding shift left - vqrshld_s64⚠AArch64 and
neon
Signed saturating rounding shift left - vqrshld_u64⚠AArch64 and
neon
Unsigned signed saturating rounding shift left - vqrshlh_s16⚠AArch64 and
neon
Signed saturating rounding shift left - vqrshlh_u16⚠AArch64 and
neon
Unsigned signed saturating rounding shift left - vqrshls_s32⚠AArch64 and
neon
Signed saturating rounding shift left - vqrshls_u32⚠AArch64 and
neon
Unsigned signed saturating rounding shift left - vqrshrn_high_n_s16⚠AArch64 and
neon
Signed saturating rounded shift right narrow - vqrshrn_high_n_s32⚠AArch64 and
neon
Signed saturating rounded shift right narrow - vqrshrn_high_n_s64⚠AArch64 and
neon
Signed saturating rounded shift right narrow - vqrshrn_high_n_u16⚠AArch64 and
neon
Unsigned saturating rounded shift right narrow - vqrshrn_high_n_u32⚠AArch64 and
neon
Unsigned saturating rounded shift right narrow - vqrshrn_high_n_u64⚠AArch64 and
neon
Unsigned saturating rounded shift right narrow - vqrshrnd_n_s64⚠AArch64 and
neon
Signed saturating rounded shift right narrow - vqrshrnd_n_u64⚠AArch64 and
neon
Unsigned saturating rounded shift right narrow - vqrshrnh_n_s16⚠AArch64 and
neon
Signed saturating rounded shift right narrow - vqrshrnh_n_u16⚠AArch64 and
neon
Unsigned saturating rounded shift right narrow - vqrshrns_n_s32⚠AArch64 and
neon
Signed saturating rounded shift right narrow - vqrshrns_n_u32⚠AArch64 and
neon
Unsigned saturating rounded shift right narrow - vqrshrun_high_n_s16⚠AArch64 and
neon
Signed saturating rounded shift right unsigned narrow - vqrshrun_high_n_s32⚠AArch64 and
neon
Signed saturating rounded shift right unsigned narrow - vqrshrun_high_n_s64⚠AArch64 and
neon
Signed saturating rounded shift right unsigned narrow - vqrshrund_n_s64⚠AArch64 and
neon
Signed saturating rounded shift right unsigned narrow - vqrshrunh_n_s16⚠AArch64 and
neon
Signed saturating rounded shift right unsigned narrow - vqrshruns_n_s32⚠AArch64 and
neon
Signed saturating rounded shift right unsigned narrow - vqshlb_n_s8⚠AArch64 and
neon
Signed saturating shift left - vqshlb_n_u8⚠AArch64 and
neon
Unsigned saturating shift left - vqshlb_s8⚠AArch64 and
neon
Signed saturating shift left - vqshlb_u8⚠AArch64 and
neon
Unsigned saturating shift left - vqshld_n_s64⚠AArch64 and
neon
Signed saturating shift left - vqshld_n_u64⚠AArch64 and
neon
Unsigned saturating shift left - vqshld_s64⚠AArch64 and
neon
Signed saturating shift left - vqshld_u64⚠AArch64 and
neon
Unsigned saturating shift left - vqshlh_n_s16⚠AArch64 and
neon
Signed saturating shift left - vqshlh_n_u16⚠AArch64 and
neon
Unsigned saturating shift left - vqshlh_s16⚠AArch64 and
neon
Signed saturating shift left - vqshlh_u16⚠AArch64 and
neon
Unsigned saturating shift left - vqshls_n_s32⚠AArch64 and
neon
Signed saturating shift left - vqshls_n_u32⚠AArch64 and
neon
Unsigned saturating shift left - vqshls_s32⚠AArch64 and
neon
Signed saturating shift left - vqshls_u32⚠AArch64 and
neon
Unsigned saturating shift left - vqshlub_n_s8⚠AArch64 and
neon
Signed saturating shift left unsigned - vqshlud_n_s64⚠AArch64 and
neon
Signed saturating shift left unsigned - vqshluh_n_s16⚠AArch64 and
neon
Signed saturating shift left unsigned - vqshlus_n_s32⚠AArch64 and
neon
Signed saturating shift left unsigned - vqshrn_high_n_s16⚠AArch64 and
neon
Signed saturating shift right narrow - vqshrn_high_n_s32⚠AArch64 and
neon
Signed saturating shift right narrow - vqshrn_high_n_s64⚠AArch64 and
neon
Signed saturating shift right narrow - vqshrn_high_n_u16⚠AArch64 and
neon
Unsigned saturating shift right narrow - vqshrn_high_n_u32⚠AArch64 and
neon
Unsigned saturating shift right narrow - vqshrn_high_n_u64⚠AArch64 and
neon
Unsigned saturating shift right narrow - vqshrnd_n_s64⚠AArch64 and
neon
Signed saturating shift right narrow - vqshrnd_n_u64⚠AArch64 and
neon
Unsigned saturating shift right narrow - vqshrnh_n_s16⚠AArch64 and
neon
Signed saturating shift right narrow - vqshrnh_n_u16⚠AArch64 and
neon
Unsigned saturating shift right narrow - vqshrns_n_s32⚠AArch64 and
neon
Signed saturating shift right narrow - vqshrns_n_u32⚠AArch64 and
neon
Unsigned saturating shift right narrow - vqshrun_high_n_s16⚠AArch64 and
neon
Signed saturating shift right unsigned narrow - vqshrun_high_n_s32⚠AArch64 and
neon
Signed saturating shift right unsigned narrow - vqshrun_high_n_s64⚠AArch64 and
neon
Signed saturating shift right unsigned narrow - vqshrund_n_s64⚠AArch64 and
neon
Signed saturating shift right unsigned narrow - vqshrunh_n_s16⚠AArch64 and
neon
Signed saturating shift right unsigned narrow - vqshruns_n_s32⚠AArch64 and
neon
Signed saturating shift right unsigned narrow - vqsubb_s8⚠AArch64 and
neon
Saturating subtract - vqsubb_u8⚠AArch64 and
neon
Saturating subtract - vqsubd_s64⚠AArch64 and
neon
Saturating subtract - vqsubd_u64⚠AArch64 and
neon
Saturating subtract - vqsubh_s16⚠AArch64 and
neon
Saturating subtract - vqsubh_u16⚠AArch64 and
neon
Saturating subtract - vqsubs_s32⚠AArch64 and
neon
Saturating subtract - vqsubs_u32⚠AArch64 and
neon
Saturating subtract - vqtbl1_p8⚠AArch64 and
neon
Table look-up - vqtbl1_s8⚠AArch64 and
neon
Table look-up - vqtbl1_u8⚠AArch64 and
neon
Table look-up - vqtbl1q_p8⚠AArch64 and
neon
Table look-up - vqtbl1q_s8⚠AArch64 and
neon
Table look-up - vqtbl1q_u8⚠AArch64 and
neon
Table look-up - vqtbl2_p8⚠AArch64 and
neon
Table look-up - vqtbl2_s8⚠AArch64 and
neon
Table look-up - vqtbl2_u8⚠AArch64 and
neon
Table look-up - vqtbl2q_p8⚠AArch64 and
neon
Table look-up - vqtbl2q_s8⚠AArch64 and
neon
Table look-up - vqtbl2q_u8⚠AArch64 and
neon
Table look-up - vqtbl3_p8⚠AArch64 and
neon
Table look-up - vqtbl3_s8⚠AArch64 and
neon
Table look-up - vqtbl3_u8⚠AArch64 and
neon
Table look-up - vqtbl3q_p8⚠AArch64 and
neon
Table look-up - vqtbl3q_s8⚠AArch64 and
neon
Table look-up - vqtbl3q_u8⚠AArch64 and
neon
Table look-up - vqtbl4_p8⚠AArch64 and
neon
Table look-up - vqtbl4_s8⚠AArch64 and
neon
Table look-up - vqtbl4_u8⚠AArch64 and
neon
Table look-up - vqtbl4q_p8⚠AArch64 and
neon
Table look-up - vqtbl4q_s8⚠AArch64 and
neon
Table look-up - vqtbl4q_u8⚠AArch64 and
neon
Table look-up - vqtbx1_p8⚠AArch64 and
neon
Extended table look-up - vqtbx1_s8⚠AArch64 and
neon
Extended table look-up - vqtbx1_u8⚠AArch64 and
neon
Extended table look-up - vqtbx1q_p8⚠AArch64 and
neon
Extended table look-up - vqtbx1q_s8⚠AArch64 and
neon
Extended table look-up - vqtbx1q_u8⚠AArch64 and
neon
Extended table look-up - vqtbx2_p8⚠AArch64 and
neon
Extended table look-up - vqtbx2_s8⚠AArch64 and
neon
Extended table look-up - vqtbx2_u8⚠AArch64 and
neon
Extended table look-up - vqtbx2q_p8⚠AArch64 and
neon
Extended table look-up - vqtbx2q_s8⚠AArch64 and
neon
Extended table look-up - vqtbx2q_u8⚠AArch64 and
neon
Extended table look-up - vqtbx3_p8⚠AArch64 and
neon
Extended table look-up - vqtbx3_s8⚠AArch64 and
neon
Extended table look-up - vqtbx3_u8⚠AArch64 and
neon
Extended table look-up - vqtbx3q_p8⚠AArch64 and
neon
Extended table look-up - vqtbx3q_s8⚠AArch64 and
neon
Extended table look-up - vqtbx3q_u8⚠AArch64 and
neon
Extended table look-up - vqtbx4_p8⚠AArch64 and
neon
Extended table look-up - vqtbx4_s8⚠AArch64 and
neon
Extended table look-up - vqtbx4_u8⚠AArch64 and
neon
Extended table look-up - vqtbx4q_p8⚠AArch64 and
neon
Extended table look-up - vqtbx4q_s8⚠AArch64 and
neon
Extended table look-up - vqtbx4q_u8⚠AArch64 and
neon
Extended table look-up - vrbit_p8⚠AArch64 and
neon
Reverse bit order - vrbit_s8⚠AArch64 and
neon
Reverse bit order - vrbit_u8⚠AArch64 and
neon
Reverse bit order - vrbitq_p8⚠AArch64 and
neon
Reverse bit order - vrbitq_s8⚠AArch64 and
neon
Reverse bit order - vrbitq_u8⚠AArch64 and
neon
Reverse bit order - vrecpe_f64⚠AArch64 and
neon
Reciprocal estimate. - vrecped_f64⚠AArch64 and
neon
Reciprocal estimate. - vrecpeq_f64⚠AArch64 and
neon
Reciprocal estimate. - vrecpes_f32⚠AArch64 and
neon
Reciprocal estimate. - vrecps_f64⚠AArch64 and
neon
Floating-point reciprocal step - vrecpsd_f64⚠AArch64 and
neon
Floating-point reciprocal step - vrecpsq_f64⚠AArch64 and
neon
Floating-point reciprocal step - vrecpss_f32⚠AArch64 and
neon
Floating-point reciprocal step - vrecpxd_f64⚠AArch64 and
neon
Floating-point reciprocal exponent - vrecpxs_f32⚠AArch64 and
neon
Floating-point reciprocal exponent - vreinterpret_f32_f64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpret_f32_p64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpret_f64_f32⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpret_f64_p8⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpret_f64_p16⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpret_f64_p64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpret_f64_s8⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpret_f64_s16⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpret_f64_s32⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpret_f64_s64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpret_f64_u8⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpret_f64_u16⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpret_f64_u32⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpret_f64_u64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpret_p8_f64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpret_p16_f64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpret_p64_f32⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpret_p64_f64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpret_p64_s64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpret_p64_u64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpret_s8_f64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpret_s16_f64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpret_s32_f64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpret_s64_f64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpret_s64_p64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpret_u8_f64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpret_u16_f64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpret_u32_f64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpret_u64_f64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpret_u64_p64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpretq_f32_f64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpretq_f32_p64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpretq_f64_f32⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpretq_f64_p8⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpretq_f64_p16⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpretq_f64_p64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpretq_f64_p128⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpretq_f64_s8⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpretq_f64_s16⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpretq_f64_s32⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpretq_f64_s64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpretq_f64_u8⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpretq_f64_u16⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpretq_f64_u32⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpretq_f64_u64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpretq_p8_f64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpretq_p16_f64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpretq_p64_f32⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpretq_p64_f64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpretq_p64_s64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpretq_p64_u64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpretq_p128_f64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpretq_s8_f64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpretq_s16_f64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpretq_s32_f64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpretq_s64_f64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpretq_s64_p64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpretq_u8_f64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpretq_u16_f64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpretq_u32_f64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpretq_u64_f64⚠AArch64 and
neon
Vector reinterpret cast operation - vreinterpretq_u64_p64⚠AArch64 and
neon
Vector reinterpret cast operation - vrnd_f32⚠AArch64 and
neon
Floating-point round to integral, toward zero - vrnd_f64⚠AArch64 and
neon
Floating-point round to integral, toward zero - vrnda_f32⚠AArch64 and
neon
Floating-point round to integral, to nearest with ties to away - vrnda_f64⚠AArch64 and
neon
Floating-point round to integral, to nearest with ties to away - vrndaq_f32⚠AArch64 and
neon
Floating-point round to integral, to nearest with ties to away - vrndaq_f64⚠AArch64 and
neon
Floating-point round to integral, to nearest with ties to away - vrndi_f32⚠AArch64 and
neon
Floating-point round to integral, using current rounding mode - vrndi_f64⚠AArch64 and
neon
Floating-point round to integral, using current rounding mode - vrndiq_f32⚠AArch64 and
neon
Floating-point round to integral, using current rounding mode - vrndiq_f64⚠AArch64 and
neon
Floating-point round to integral, using current rounding mode - vrndm_f32⚠AArch64 and
neon
Floating-point round to integral, toward minus infinity - vrndm_f64⚠AArch64 and
neon
Floating-point round to integral, toward minus infinity - vrndmq_f32⚠AArch64 and
neon
Floating-point round to integral, toward minus infinity - vrndmq_f64⚠AArch64 and
neon
Floating-point round to integral, toward minus infinity - vrndn_f64⚠AArch64 and
neon
Floating-point round to integral, to nearest with ties to even - vrndnq_f64⚠AArch64 and
neon
Floating-point round to integral, to nearest with ties to even - vrndns_f32⚠AArch64 and
neon
Floating-point round to integral, to nearest with ties to even - vrndp_f32⚠AArch64 and
neon
Floating-point round to integral, toward plus infinity - vrndp_f64⚠AArch64 and
neon
Floating-point round to integral, toward plus infinity - vrndpq_f32⚠AArch64 and
neon
Floating-point round to integral, toward plus infinity - vrndpq_f64⚠AArch64 and
neon
Floating-point round to integral, toward plus infinity - vrndq_f32⚠AArch64 and
neon
Floating-point round to integral, toward zero - vrndq_f64⚠AArch64 and
neon
Floating-point round to integral, toward zero - vrndx_f32⚠AArch64 and
neon
Floating-point round to integral exact, using current rounding mode - vrndx_f64⚠AArch64 and
neon
Floating-point round to integral exact, using current rounding mode - vrndxq_f32⚠AArch64 and
neon
Floating-point round to integral exact, using current rounding mode - vrndxq_f64⚠AArch64 and
neon
Floating-point round to integral exact, using current rounding mode - vrshld_s64⚠AArch64 and
neon
Signed rounding shift left - vrshld_u64⚠AArch64 and
neon
Unsigned rounding shift left - vrshrd_n_s64⚠AArch64 and
neon
Signed rounding shift right - vrshrd_n_u64⚠AArch64 and
neon
Unsigned rounding shift right - vrshrn_high_n_s16⚠AArch64 and
neon
Rounding shift right narrow - vrshrn_high_n_s32⚠AArch64 and
neon
Rounding shift right narrow - vrshrn_high_n_s64⚠AArch64 and
neon
Rounding shift right narrow - vrshrn_high_n_u16⚠AArch64 and
neon
Rounding shift right narrow - vrshrn_high_n_u32⚠AArch64 and
neon
Rounding shift right narrow - vrshrn_high_n_u64⚠AArch64 and
neon
Rounding shift right narrow - vrsqrte_f64⚠AArch64 and
neon
Reciprocal square-root estimate. - vrsqrted_f64⚠AArch64 and
neon
Reciprocal square-root estimate. - vrsqrteq_f64⚠AArch64 and
neon
Reciprocal square-root estimate. - vrsqrtes_f32⚠AArch64 and
neon
Reciprocal square-root estimate. - vrsqrts_f64⚠AArch64 and
neon
Floating-point reciprocal square root step - vrsqrtsd_f64⚠AArch64 and
neon
Floating-point reciprocal square root step - vrsqrtsq_f64⚠AArch64 and
neon
Floating-point reciprocal square root step - vrsqrtss_f32⚠AArch64 and
neon
Floating-point reciprocal square root step - vrsrad_n_s64⚠AArch64 and
neon
Signed rounding shift right and accumulate. - vrsrad_n_u64⚠AArch64 and
neon
Unsigned rounding shift right and accumulate. - vrsubhn_high_s16⚠AArch64 and
neon
Rounding subtract returning high narrow - vrsubhn_high_s32⚠AArch64 and
neon
Rounding subtract returning high narrow - vrsubhn_high_s64⚠AArch64 and
neon
Rounding subtract returning high narrow - vrsubhn_high_u16⚠AArch64 and
neon
Rounding subtract returning high narrow - vrsubhn_high_u32⚠AArch64 and
neon
Rounding subtract returning high narrow - vrsubhn_high_u64⚠AArch64 and
neon
Rounding subtract returning high narrow - vset_lane_f64⚠AArch64 and
neon
Insert vector element from another vector element - vsetq_lane_f64⚠AArch64 and
neon
Insert vector element from another vector element - vshld_n_s64⚠AArch64 and
neon
Shift left - vshld_n_u64⚠AArch64 and
neon
Shift left - vshld_s64⚠AArch64 and
neon
Signed Shift left - vshld_u64⚠AArch64 and
neon
Unsigned Shift left - vshll_high_n_s8⚠AArch64 and
neon
Signed shift left long - vshll_high_n_s16⚠AArch64 and
neon
Signed shift left long - vshll_high_n_s32⚠AArch64 and
neon
Signed shift left long - vshll_high_n_u8⚠AArch64 and
neon
Signed shift left long - vshll_high_n_u16⚠AArch64 and
neon
Signed shift left long - vshll_high_n_u32⚠AArch64 and
neon
Signed shift left long - vshrd_n_s64⚠AArch64 and
neon
Signed shift right - vshrd_n_u64⚠AArch64 and
neon
Unsigned shift right - vshrn_high_n_s16⚠AArch64 and
neon
Shift right narrow - vshrn_high_n_s32⚠AArch64 and
neon
Shift right narrow - vshrn_high_n_s64⚠AArch64 and
neon
Shift right narrow - vshrn_high_n_u16⚠AArch64 and
neon
Shift right narrow - vshrn_high_n_u32⚠AArch64 and
neon
Shift right narrow - vshrn_high_n_u64⚠AArch64 and
neon
Shift right narrow - vsli_n_p8⚠AArch64 and
neon
Shift Left and Insert (immediate) - vsli_n_p16⚠AArch64 and
neon
Shift Left and Insert (immediate) - vsli_n_p64⚠AArch64 and
neon,aes
Shift Left and Insert (immediate) - vsli_n_s8⚠AArch64 and
neon
Shift Left and Insert (immediate) - vsli_n_s16⚠AArch64 and
neon
Shift Left and Insert (immediate) - vsli_n_s32⚠AArch64 and
neon
Shift Left and Insert (immediate) - vsli_n_s64⚠AArch64 and
neon
Shift Left and Insert (immediate) - vsli_n_u8⚠AArch64 and
neon
Shift Left and Insert (immediate) - vsli_n_u16⚠AArch64 and
neon
Shift Left and Insert (immediate) - vsli_n_u32⚠AArch64 and
neon
Shift Left and Insert (immediate) - vsli_n_u64⚠AArch64 and
neon
Shift Left and Insert (immediate) - vslid_n_s64⚠AArch64 and
neon
Shift left and insert - vslid_n_u64⚠AArch64 and
neon
Shift left and insert - vsliq_n_p8⚠AArch64 and
neon
Shift Left and Insert (immediate) - vsliq_n_p16⚠AArch64 and
neon
Shift Left and Insert (immediate) - vsliq_n_p64⚠AArch64 and
neon,aes
Shift Left and Insert (immediate) - vsliq_n_s8⚠AArch64 and
neon
Shift Left and Insert (immediate) - vsliq_n_s16⚠AArch64 and
neon
Shift Left and Insert (immediate) - vsliq_n_s32⚠AArch64 and
neon
Shift Left and Insert (immediate) - vsliq_n_s64⚠AArch64 and
neon
Shift Left and Insert (immediate) - vsliq_n_u8⚠AArch64 and
neon
Shift Left and Insert (immediate) - vsliq_n_u16⚠AArch64 and
neon
Shift Left and Insert (immediate) - vsliq_n_u32⚠AArch64 and
neon
Shift Left and Insert (immediate) - vsliq_n_u64⚠AArch64 and
neon
Shift Left and Insert (immediate) - vsqadd_u8⚠AArch64 and
neon
Unsigned saturating Accumulate of Signed value. - vsqadd_u16⚠AArch64 and
neon
Unsigned saturating Accumulate of Signed value. - vsqadd_u32⚠AArch64 and
neon
Unsigned saturating Accumulate of Signed value. - vsqadd_u64⚠AArch64 and
neon
Unsigned saturating Accumulate of Signed value. - vsqaddb_u8⚠AArch64 and
neon
Unsigned saturating accumulate of signed value - vsqaddd_u64⚠AArch64 and
neon
Unsigned saturating accumulate of signed value - vsqaddh_u16⚠AArch64 and
neon
Unsigned saturating accumulate of signed value - vsqaddq_u8⚠AArch64 and
neon
Unsigned saturating Accumulate of Signed value. - vsqaddq_u16⚠AArch64 and
neon
Unsigned saturating Accumulate of Signed value. - vsqaddq_u32⚠AArch64 and
neon
Unsigned saturating Accumulate of Signed value. - vsqaddq_u64⚠AArch64 and
neon
Unsigned saturating Accumulate of Signed value. - vsqadds_u32⚠AArch64 and
neon
Unsigned saturating accumulate of signed value - vsqrt_f32⚠AArch64 and
neon
Calculates the square root of each lane. - vsqrt_f64⚠AArch64 and
neon
Calculates the square root of each lane. - vsqrtq_f32⚠AArch64 and
neon
Calculates the square root of each lane. - vsqrtq_f64⚠AArch64 and
neon
Calculates the square root of each lane. - vsrad_n_s64⚠AArch64 and
neon
Signed shift right and accumulate - vsrad_n_u64⚠AArch64 and
neon
Unsigned shift right and accumulate - vsri_n_p8⚠AArch64 and
neon
Shift Right and Insert (immediate) - vsri_n_p16⚠AArch64 and
neon
Shift Right and Insert (immediate) - vsri_n_p64⚠AArch64 and
neon,aes
Shift Right and Insert (immediate) - vsri_n_s8⚠AArch64 and
neon
Shift Right and Insert (immediate) - vsri_n_s16⚠AArch64 and
neon
Shift Right and Insert (immediate) - vsri_n_s32⚠AArch64 and
neon
Shift Right and Insert (immediate) - vsri_n_s64⚠AArch64 and
neon
Shift Right and Insert (immediate) - vsri_n_u8⚠AArch64 and
neon
Shift Right and Insert (immediate) - vsri_n_u16⚠AArch64 and
neon
Shift Right and Insert (immediate) - vsri_n_u32⚠AArch64 and
neon
Shift Right and Insert (immediate) - vsri_n_u64⚠AArch64 and
neon
Shift Right and Insert (immediate) - vsrid_n_s64⚠AArch64 and
neon
Shift right and insert - vsrid_n_u64⚠AArch64 and
neon
Shift right and insert - vsriq_n_p8⚠AArch64 and
neon
Shift Right and Insert (immediate) - vsriq_n_p16⚠AArch64 and
neon
Shift Right and Insert (immediate) - vsriq_n_p64⚠AArch64 and
neon,aes
Shift Right and Insert (immediate) - vsriq_n_s8⚠AArch64 and
neon
Shift Right and Insert (immediate) - vsriq_n_s16⚠AArch64 and
neon
Shift Right and Insert (immediate) - vsriq_n_s32⚠AArch64 and
neon
Shift Right and Insert (immediate) - vsriq_n_s64⚠AArch64 and
neon
Shift Right and Insert (immediate) - vsriq_n_u8⚠AArch64 and
neon
Shift Right and Insert (immediate) - vsriq_n_u16⚠AArch64 and
neon
Shift Right and Insert (immediate) - vsriq_n_u32⚠AArch64 and
neon
Shift Right and Insert (immediate) - vsriq_n_u64⚠AArch64 and
neon
Shift Right and Insert (immediate) - vst1_f32⚠AArch64 and
neon
- vst1_f64⚠AArch64 and
neon
- vst1_f64_x2⚠AArch64 and
neon
Store multiple single-element structures to one, two, three, or four registers - vst1_f64_x3⚠AArch64 and
neon
Store multiple single-element structures to one, two, three, or four registers - vst1_f64_x4⚠AArch64 and
neon
Store multiple single-element structures to one, two, three, or four registers - vst1_lane_f64⚠AArch64 and
neon
Store multiple single-element structures from one, two, three, or four registers - vst1_p8⚠AArch64 and
neon
Store multiple single-element structures from one, two, three, or four registers. - vst1_p16⚠AArch64 and
neon
Store multiple single-element structures from one, two, three, or four registers. - vst1_p64⚠AArch64 and
neon,aes
- vst1_s8⚠AArch64 and
neon
Store multiple single-element structures from one, two, three, or four registers. - vst1_s16⚠AArch64 and
neon
Store multiple single-element structures from one, two, three, or four registers. - vst1_s32⚠AArch64 and
neon
Store multiple single-element structures from one, two, three, or four registers. - vst1_s64⚠AArch64 and
neon
Store multiple single-element structures from one, two, three, or four registers. - vst1_u8⚠AArch64 and
neon
Store multiple single-element structures from one, two, three, or four registers. - vst1_u16⚠AArch64 and
neon
Store multiple single-element structures from one, two, three, or four registers. - vst1_u32⚠AArch64 and
neon
Store multiple single-element structures from one, two, three, or four registers. - vst1_u64⚠AArch64 and
neon
Store multiple single-element structures from one, two, three, or four registers. - vst1q_f32⚠AArch64 and
neon
- vst1q_f64⚠AArch64 and
neon
- vst1q_f64_x2⚠AArch64 and
neon
Store multiple single-element structures to one, two, three, or four registers - vst1q_f64_x3⚠AArch64 and
neon
Store multiple single-element structures to one, two, three, or four registers - vst1q_f64_x4⚠AArch64 and
neon
Store multiple single-element structures to one, two, three, or four registers - vst1q_lane_f64⚠AArch64 and
neon
Store multiple single-element structures from one, two, three, or four registers - vst1q_p8⚠AArch64 and
neon
Store multiple single-element structures from one, two, three, or four registers. - vst1q_p16⚠AArch64 and
neon
Store multiple single-element structures from one, two, three, or four registers. - vst1q_p64⚠AArch64 and
neon,aes
- vst1q_s8⚠AArch64 and
neon
Store multiple single-element structures from one, two, three, or four registers. - vst1q_s16⚠AArch64 and
neon
Store multiple single-element structures from one, two, three, or four registers. - vst1q_s32⚠AArch64 and
neon
Store multiple single-element structures from one, two, three, or four registers. - vst1q_s64⚠AArch64 and
neon
Store multiple single-element structures from one, two, three, or four registers. - vst1q_u8⚠AArch64 and
neon
Store multiple single-element structures from one, two, three, or four registers. - vst1q_u16⚠AArch64 and
neon
Store multiple single-element structures from one, two, three, or four registers. - vst1q_u32⚠AArch64 and
neon
Store multiple single-element structures from one, two, three, or four registers. - vst1q_u64⚠AArch64 and
neon
Store multiple single-element structures from one, two, three, or four registers. - vst2_f64⚠AArch64 and
neon
Store multiple 2-element structures from two registers - vst2_lane_f64⚠AArch64 and
neon
Store multiple 2-element structures from two registers - vst2_lane_p64⚠AArch64 and
neon,aes
Store multiple 2-element structures from two registers - vst2_lane_s64⚠AArch64 and
neon
Store multiple 2-element structures from two registers - vst2_lane_u64⚠AArch64 and
neon
Store multiple 2-element structures from two registers - vst2q_f64⚠AArch64 and
neon
Store multiple 2-element structures from two registers - vst2q_lane_f64⚠AArch64 and
neon
Store multiple 2-element structures from two registers - vst2q_lane_p8⚠AArch64 and
neon
Store multiple 2-element structures from two registers - vst2q_lane_p64⚠AArch64 and
neon,aes
Store multiple 2-element structures from two registers - vst2q_lane_s8⚠AArch64 and
neon
Store multiple 2-element structures from two registers - vst2q_lane_s64⚠AArch64 and
neon
Store multiple 2-element structures from two registers - vst2q_lane_u8⚠AArch64 and
neon
Store multiple 2-element structures from two registers - vst2q_lane_u64⚠AArch64 and
neon
Store multiple 2-element structures from two registers - vst2q_p64⚠AArch64 and
neon,aes
Store multiple 2-element structures from two registers - vst2q_s64⚠AArch64 and
neon
Store multiple 2-element structures from two registers - vst2q_u64⚠AArch64 and
neon
Store multiple 2-element structures from two registers - vst3_f64⚠AArch64 and
neon
Store multiple 3-element structures from three registers - vst3_lane_f64⚠AArch64 and
neon
Store multiple 3-element structures from three registers - vst3_lane_p64⚠AArch64 and
neon,aes
Store multiple 3-element structures from three registers - vst3_lane_s64⚠AArch64 and
neon
Store multiple 3-element structures from three registers - vst3_lane_u64⚠AArch64 and
neon
Store multiple 3-element structures from three registers - vst3q_f64⚠AArch64 and
neon
Store multiple 3-element structures from three registers - vst3q_lane_f64⚠AArch64 and
neon
Store multiple 3-element structures from three registers - vst3q_lane_p8⚠AArch64 and
neon
Store multiple 3-element structures from three registers - vst3q_lane_p64⚠AArch64 and
neon,aes
Store multiple 3-element structures from three registers - vst3q_lane_s8⚠AArch64 and
neon
Store multiple 3-element structures from three registers - vst3q_lane_s64⚠AArch64 and
neon
Store multiple 3-element structures from three registers - vst3q_lane_u8⚠AArch64 and
neon
Store multiple 3-element structures from three registers - vst3q_lane_u64⚠AArch64 and
neon
Store multiple 3-element structures from three registers - vst3q_p64⚠AArch64 and
neon,aes
Store multiple 3-element structures from three registers - vst3q_s64⚠AArch64 and
neon
Store multiple 3-element structures from three registers - vst3q_u64⚠AArch64 and
neon
Store multiple 3-element structures from three registers - vst4_f64⚠AArch64 and
neon
Store multiple 4-element structures from four registers - vst4_lane_f64⚠AArch64 and
neon
Store multiple 4-element structures from four registers - vst4_lane_p64⚠AArch64 and
neon,aes
Store multiple 4-element structures from four registers - vst4_lane_s64⚠AArch64 and
neon
Store multiple 4-element structures from four registers - vst4_lane_u64⚠AArch64 and
neon
Store multiple 4-element structures from four registers - vst4q_f64⚠AArch64 and
neon
Store multiple 4-element structures from four registers - vst4q_lane_f64⚠AArch64 and
neon
Store multiple 4-element structures from four registers - vst4q_lane_p8⚠AArch64 and
neon
Store multiple 4-element structures from four registers - vst4q_lane_p64⚠AArch64 and
neon,aes
Store multiple 4-element structures from four registers - vst4q_lane_s8⚠AArch64 and
neon
Store multiple 4-element structures from four registers - vst4q_lane_s64⚠AArch64 and
neon
Store multiple 4-element structures from four registers - vst4q_lane_u8⚠AArch64 and
neon
Store multiple 4-element structures from four registers - vst4q_lane_u64⚠AArch64 and
neon
Store multiple 4-element structures from four registers - vst4q_p64⚠AArch64 and
neon,aes
Store multiple 4-element structures from four registers - vst4q_s64⚠AArch64 and
neon
Store multiple 4-element structures from four registers - vst4q_u64⚠AArch64 and
neon
Store multiple 4-element structures from four registers - vsub_f64⚠AArch64 and
neon
Subtract - vsubd_s64⚠AArch64 and
neon
Subtract - vsubd_u64⚠AArch64 and
neon
Subtract - vsubl_high_s8⚠AArch64 and
neon
Signed Subtract Long - vsubl_high_s16⚠AArch64 and
neon
Signed Subtract Long - vsubl_high_s32⚠AArch64 and
neon
Signed Subtract Long - vsubl_high_u8⚠AArch64 and
neon
Unsigned Subtract Long - vsubl_high_u16⚠AArch64 and
neon
Unsigned Subtract Long - vsubl_high_u32⚠AArch64 and
neon
Unsigned Subtract Long - vsubq_f64⚠AArch64 and
neon
Subtract - vsubw_high_s8⚠AArch64 and
neon
Signed Subtract Wide - vsubw_high_s16⚠AArch64 and
neon
Signed Subtract Wide - vsubw_high_s32⚠AArch64 and
neon
Signed Subtract Wide - vsubw_high_u8⚠AArch64 and
neon
Unsigned Subtract Wide - vsubw_high_u16⚠AArch64 and
neon
Unsigned Subtract Wide - vsubw_high_u32⚠AArch64 and
neon
Unsigned Subtract Wide - vtbl1_p8⚠AArch64 and
neon
Table look-up - vtbl1_s8⚠AArch64 and
neon
Table look-up - vtbl1_u8⚠AArch64 and
neon
Table look-up - vtbl2_p8⚠AArch64 and
neon
Table look-up - vtbl2_s8⚠AArch64 and
neon
Table look-up - vtbl2_u8⚠AArch64 and
neon
Table look-up - vtbl3_p8⚠AArch64 and
neon
Table look-up - vtbl3_s8⚠AArch64 and
neon
Table look-up - vtbl3_u8⚠AArch64 and
neon
Table look-up - vtbl4_p8⚠AArch64 and
neon
Table look-up - vtbl4_s8⚠AArch64 and
neon
Table look-up - vtbl4_u8⚠AArch64 and
neon
Table look-up - vtbx1_p8⚠AArch64 and
neon
Extended table look-up - vtbx1_s8⚠AArch64 and
neon
Extended table look-up - vtbx1_u8⚠AArch64 and
neon
Extended table look-up - vtbx2_p8⚠AArch64 and
neon
Extended table look-up - vtbx2_s8⚠AArch64 and
neon
Extended table look-up - vtbx2_u8⚠AArch64 and
neon
Extended table look-up - vtbx3_p8⚠AArch64 and
neon
Extended table look-up - vtbx3_s8⚠AArch64 and
neon
Extended table look-up - vtbx3_u8⚠AArch64 and
neon
Extended table look-up - vtbx4_p8⚠AArch64 and
neon
Extended table look-up - vtbx4_s8⚠AArch64 and
neon
Extended table look-up - vtbx4_u8⚠AArch64 and
neon
Extended table look-up - vtrn1_f32⚠AArch64 and
neon
Transpose vectors - vtrn1_p8⚠AArch64 and
neon
Transpose vectors - vtrn1_p16⚠AArch64 and
neon
Transpose vectors - vtrn1_s8⚠AArch64 and
neon
Transpose vectors - vtrn1_s16⚠AArch64 and
neon
Transpose vectors - vtrn1_s32⚠AArch64 and
neon
Transpose vectors - vtrn1_u8⚠AArch64 and
neon
Transpose vectors - vtrn1_u16⚠AArch64 and
neon
Transpose vectors - vtrn1_u32⚠AArch64 and
neon
Transpose vectors - vtrn1q_f32⚠AArch64 and
neon
Transpose vectors - vtrn1q_f64⚠AArch64 and
neon
Transpose vectors - vtrn1q_p8⚠AArch64 and
neon
Transpose vectors - vtrn1q_p16⚠AArch64 and
neon
Transpose vectors - vtrn1q_p64⚠AArch64 and
neon
Transpose vectors - vtrn1q_s8⚠AArch64 and
neon
Transpose vectors - vtrn1q_s16⚠AArch64 and
neon
Transpose vectors - vtrn1q_s32⚠AArch64 and
neon
Transpose vectors - vtrn1q_s64⚠AArch64 and
neon
Transpose vectors - vtrn1q_u8⚠AArch64 and
neon
Transpose vectors - vtrn1q_u16⚠AArch64 and
neon
Transpose vectors - vtrn1q_u32⚠AArch64 and
neon
Transpose vectors - vtrn1q_u64⚠AArch64 and
neon
Transpose vectors - vtrn2_f32⚠AArch64 and
neon
Transpose vectors - vtrn2_p8⚠AArch64 and
neon
Transpose vectors - vtrn2_p16⚠AArch64 and
neon
Transpose vectors - vtrn2_s8⚠AArch64 and
neon
Transpose vectors - vtrn2_s16⚠AArch64 and
neon
Transpose vectors - vtrn2_s32⚠AArch64 and
neon
Transpose vectors - vtrn2_u8⚠AArch64 and
neon
Transpose vectors - vtrn2_u16⚠AArch64 and
neon
Transpose vectors - vtrn2_u32⚠AArch64 and
neon
Transpose vectors - vtrn2q_f32⚠AArch64 and
neon
Transpose vectors - vtrn2q_f64⚠AArch64 and
neon
Transpose vectors - vtrn2q_p8⚠AArch64 and
neon
Transpose vectors - vtrn2q_p16⚠AArch64 and
neon
Transpose vectors - vtrn2q_p64⚠AArch64 and
neon
Transpose vectors - vtrn2q_s8⚠AArch64 and
neon
Transpose vectors - vtrn2q_s16⚠AArch64 and
neon
Transpose vectors - vtrn2q_s32⚠AArch64 and
neon
Transpose vectors - vtrn2q_s64⚠AArch64 and
neon
Transpose vectors - vtrn2q_u8⚠AArch64 and
neon
Transpose vectors - vtrn2q_u16⚠AArch64 and
neon
Transpose vectors - vtrn2q_u32⚠AArch64 and
neon
Transpose vectors - vtrn2q_u64⚠AArch64 and
neon
Transpose vectors - vtst_p64⚠AArch64 and
neon
Signed compare bitwise Test bits nonzero - vtst_s64⚠AArch64 and
neon
Signed compare bitwise Test bits nonzero - vtst_u64⚠AArch64 and
neon
Unsigned compare bitwise Test bits nonzero - vtstd_s64⚠AArch64 and
neon
Compare bitwise test bits nonzero - vtstd_u64⚠AArch64 and
neon
Compare bitwise test bits nonzero - vtstq_p64⚠AArch64 and
neon
Signed compare bitwise Test bits nonzero - vtstq_s64⚠AArch64 and
neon
Signed compare bitwise Test bits nonzero - vtstq_u64⚠AArch64 and
neon
Unsigned compare bitwise Test bits nonzero - vuqadd_s8⚠AArch64 and
neon
Signed saturating Accumulate of Unsigned value. - vuqadd_s16⚠AArch64 and
neon
Signed saturating Accumulate of Unsigned value. - vuqadd_s32⚠AArch64 and
neon
Signed saturating Accumulate of Unsigned value. - vuqadd_s64⚠AArch64 and
neon
Signed saturating Accumulate of Unsigned value. - vuqaddb_s8⚠AArch64 and
neon
Signed saturating accumulate of unsigned value - vuqaddd_s64⚠AArch64 and
neon
Signed saturating accumulate of unsigned value - vuqaddh_s16⚠AArch64 and
neon
Signed saturating accumulate of unsigned value - vuqaddq_s8⚠AArch64 and
neon
Signed saturating Accumulate of Unsigned value. - vuqaddq_s16⚠AArch64 and
neon
Signed saturating Accumulate of Unsigned value. - vuqaddq_s32⚠AArch64 and
neon
Signed saturating Accumulate of Unsigned value. - vuqaddq_s64⚠AArch64 and
neon
Signed saturating Accumulate of Unsigned value. - vuqadds_s32⚠AArch64 and
neon
Signed saturating accumulate of unsigned value - vuzp1_f32⚠AArch64 and
neon
Unzip vectors - vuzp1_p8⚠AArch64 and
neon
Unzip vectors - vuzp1_p16⚠AArch64 and
neon
Unzip vectors - vuzp1_s8⚠AArch64 and
neon
Unzip vectors - vuzp1_s16⚠AArch64 and
neon
Unzip vectors - vuzp1_s32⚠AArch64 and
neon
Unzip vectors - vuzp1_u8⚠AArch64 and
neon
Unzip vectors - vuzp1_u16⚠AArch64 and
neon
Unzip vectors - vuzp1_u32⚠AArch64 and
neon
Unzip vectors - vuzp1q_f32⚠AArch64 and
neon
Unzip vectors - vuzp1q_f64⚠AArch64 and
neon
Unzip vectors - vuzp1q_p8⚠AArch64 and
neon
Unzip vectors - vuzp1q_p16⚠AArch64 and
neon
Unzip vectors - vuzp1q_p64⚠AArch64 and
neon
Unzip vectors - vuzp1q_s8⚠AArch64 and
neon
Unzip vectors - vuzp1q_s16⚠AArch64 and
neon
Unzip vectors - vuzp1q_s32⚠AArch64 and
neon
Unzip vectors - vuzp1q_s64⚠AArch64 and
neon
Unzip vectors - vuzp1q_u8⚠AArch64 and
neon
Unzip vectors - vuzp1q_u16⚠AArch64 and
neon
Unzip vectors - vuzp1q_u32⚠AArch64 and
neon
Unzip vectors - vuzp1q_u64⚠AArch64 and
neon
Unzip vectors - vuzp2_f32⚠AArch64 and
neon
Unzip vectors - vuzp2_p8⚠AArch64 and
neon
Unzip vectors - vuzp2_p16⚠AArch64 and
neon
Unzip vectors - vuzp2_s8⚠AArch64 and
neon
Unzip vectors - vuzp2_s16⚠AArch64 and
neon
Unzip vectors - vuzp2_s32⚠AArch64 and
neon
Unzip vectors - vuzp2_u8⚠AArch64 and
neon
Unzip vectors - vuzp2_u16⚠AArch64 and
neon
Unzip vectors - vuzp2_u32⚠AArch64 and
neon
Unzip vectors - vuzp2q_f32⚠AArch64 and
neon
Unzip vectors - vuzp2q_f64⚠AArch64 and
neon
Unzip vectors - vuzp2q_p8⚠AArch64 and
neon
Unzip vectors - vuzp2q_p16⚠AArch64 and
neon
Unzip vectors - vuzp2q_p64⚠AArch64 and
neon
Unzip vectors - vuzp2q_s8⚠AArch64 and
neon
Unzip vectors - vuzp2q_s16⚠AArch64 and
neon
Unzip vectors - vuzp2q_s32⚠AArch64 and
neon
Unzip vectors - vuzp2q_s64⚠AArch64 and
neon
Unzip vectors - vuzp2q_u8⚠AArch64 and
neon
Unzip vectors - vuzp2q_u16⚠AArch64 and
neon
Unzip vectors - vuzp2q_u32⚠AArch64 and
neon
Unzip vectors - vuzp2q_u64⚠AArch64 and
neon
Unzip vectors - vzip1_f32⚠AArch64 and
neon
Zip vectors - vzip1_p8⚠AArch64 and
neon
Zip vectors - vzip1_p16⚠AArch64 and
neon
Zip vectors - vzip1_s8⚠AArch64 and
neon
Zip vectors - vzip1_s16⚠AArch64 and
neon
Zip vectors - vzip1_s32⚠AArch64 and
neon
Zip vectors - vzip1_u8⚠AArch64 and
neon
Zip vectors - vzip1_u16⚠AArch64 and
neon
Zip vectors - vzip1_u32⚠AArch64 and
neon
Zip vectors - vzip1q_f32⚠AArch64 and
neon
Zip vectors - vzip1q_f64⚠AArch64 and
neon
Zip vectors - vzip1q_p8⚠AArch64 and
neon
Zip vectors - vzip1q_p16⚠AArch64 and
neon
Zip vectors - vzip1q_p64⚠AArch64 and
neon
Zip vectors - vzip1q_s8⚠AArch64 and
neon
Zip vectors - vzip1q_s16⚠AArch64 and
neon
Zip vectors - vzip1q_s32⚠AArch64 and
neon
Zip vectors - vzip1q_s64⚠AArch64 and
neon
Zip vectors - vzip1q_u8⚠AArch64 and
neon
Zip vectors - vzip1q_u16⚠AArch64 and
neon
Zip vectors - vzip1q_u32⚠AArch64 and
neon
Zip vectors - vzip1q_u64⚠AArch64 and
neon
Zip vectors - vzip2_f32⚠AArch64 and
neon
Zip vectors - vzip2_p8⚠AArch64 and
neon
Zip vectors - vzip2_p16⚠AArch64 and
neon
Zip vectors - vzip2_s8⚠AArch64 and
neon
Zip vectors - vzip2_s16⚠AArch64 and
neon
Zip vectors - vzip2_s32⚠AArch64 and
neon
Zip vectors - vzip2_u8⚠AArch64 and
neon
Zip vectors - vzip2_u16⚠AArch64 and
neon
Zip vectors - vzip2_u32⚠AArch64 and
neon
Zip vectors - vzip2q_f32⚠AArch64 and
neon
Zip vectors - vzip2q_f64⚠AArch64 and
neon
Zip vectors - vzip2q_p8⚠AArch64 and
neon
Zip vectors - vzip2q_p16⚠AArch64 and
neon
Zip vectors - vzip2q_p64⚠AArch64 and
neon
Zip vectors - vzip2q_s8⚠AArch64 and
neon
Zip vectors - vzip2q_s16⚠AArch64 and
neon
Zip vectors - vzip2q_s32⚠AArch64 and
neon
Zip vectors - vzip2q_s64⚠AArch64 and
neon
Zip vectors - vzip2q_u8⚠AArch64 and
neon
Zip vectors - vzip2q_u16⚠AArch64 and
neon
Zip vectors - vzip2q_u32⚠AArch64 and
neon
Zip vectors - vzip2q_u64⚠AArch64 and
neon
Zip vectors - CRC32 single round checksum for bytes (8 bits).
- CRC32-C single round checksum for bytes (8 bits).
- CRC32-C single round checksum for quad words (64 bits).
- CRC32-C single round checksum for half words (16 bits).
- CRC32-C single round checksum for words (32 bits).
- CRC32 single round checksum for quad words (64 bits).
- CRC32 single round checksum for half words (16 bits).
- CRC32 single round checksum for words (32 bits).
- __dmb⚠ExperimentalGenerates a DMB (data memory barrier) instruction or equivalent CP15 instruction.
- __dsb⚠ExperimentalGenerates a DSB (data synchronization barrier) instruction or equivalent CP15 instruction.
- __isb⚠ExperimentalGenerates an ISB (instruction synchronization barrier) instruction or equivalent CP15 instruction.
- __nop⚠ExperimentalGenerates an unspecified no-op instruction.
- __sev⚠ExperimentalGenerates a SEV (send a global event) hint instruction.
- __sevl⚠ExperimentalGenerates a send a local event hint instruction.
- Cancels the current transaction and discards all state modifications that were performed transactionally.
- Commits the current transaction. For a nested transaction, the only effect is that the transactional nesting depth is decreased. For an outer transaction, the state modifications performed transactionally are committed to the architectural state.
- Starts a new transaction. When the transaction starts successfully the return value is 0. If the transaction fails, all state modifications are discarded and a cause of the failure is encoded in the return value.
- Tests if executing inside a transaction. If no transaction is currently executing, the return value is 0. Otherwise, this intrinsic returns the depth of the transaction.
- __wfe⚠ExperimentalGenerates a WFE (wait for event) hint instruction, or nothing.
- __wfi⚠ExperimentalGenerates a WFI (wait for interrupt) hint instruction, or nothing.
- __yield⚠ExperimentalGenerates a YIELD hint instruction.
- Fetch the cache line that contains address
p
using the givenRW
andLOCALITY
. - Signed Absolute difference and Accumulate Long
- Signed Absolute difference and Accumulate Long
- Signed Absolute difference and Accumulate Long
- Unsigned Absolute difference and Accumulate Long
- Unsigned Absolute difference and Accumulate Long
- Unsigned Absolute difference and Accumulate Long
- Absolute difference between the arguments of Floating
- Absolute difference between the arguments
- Absolute difference between the arguments
- Absolute difference between the arguments
- Absolute difference between the arguments
- Absolute difference between the arguments
- Absolute difference between the arguments
- Signed Absolute difference Long
- Signed Absolute difference Long
- Signed Absolute difference Long
- Unsigned Absolute difference Long
- Unsigned Absolute difference Long
- Unsigned Absolute difference Long
- Absolute difference between the arguments of Floating
- Absolute difference between the arguments
- Absolute difference between the arguments
- Absolute difference between the arguments
- Absolute difference between the arguments
- Absolute difference between the arguments
- Absolute difference between the arguments
- Floating-point absolute value
- Absolute value (wrapping).
- Absolute value (wrapping).
- Absolute value (wrapping).
- Floating-point absolute value
- Absolute value (wrapping).
- Absolute value (wrapping).
- Absolute value (wrapping).
- Vector add.
- Bitwise exclusive OR
- Bitwise exclusive OR
- Bitwise exclusive OR
- Vector add.
- Vector add.
- Vector add.
- Vector add.
- Vector add.
- Vector add.
- Add returning High Narrow (high half).
- Add returning High Narrow (high half).
- Add returning High Narrow (high half).
- Add returning High Narrow (high half).
- Add returning High Narrow (high half).
- Add returning High Narrow (high half).
- Add returning High Narrow.
- Add returning High Narrow.
- Add returning High Narrow.
- Add returning High Narrow.
- Add returning High Narrow.
- Add returning High Narrow.
- Signed Add Long (vector, high half).
- Signed Add Long (vector, high half).
- Signed Add Long (vector, high half).
- Unsigned Add Long (vector, high half).
- Unsigned Add Long (vector, high half).
- Unsigned Add Long (vector, high half).
- Signed Add Long (vector).
- Signed Add Long (vector).
- Signed Add Long (vector).
- Unsigned Add Long (vector).
- Unsigned Add Long (vector).
- Unsigned Add Long (vector).
- Vector add.
- Bitwise exclusive OR
- Bitwise exclusive OR
- Bitwise exclusive OR
- Bitwise exclusive OR
- Vector add.
- Vector add.
- Vector add.
- Vector add.
- Vector add.
- Vector add.
- Vector add.
- Vector add.
- Signed Add Wide (high half).
- Signed Add Wide (high half).
- Signed Add Wide (high half).
- Unsigned Add Wide (high half).
- Unsigned Add Wide (high half).
- Unsigned Add Wide (high half).
- Signed Add Wide.
- Signed Add Wide.
- Signed Add Wide.
- Unsigned Add Wide.
- Unsigned Add Wide.
- Unsigned Add Wide.
- AES single round decryption.
- AES single round encryption.
- AES inverse mix columns.
- AES mix columns.
- Vector bitwise and
- Vector bitwise and
- Vector bitwise and
- Vector bitwise and
- Vector bitwise and
- Vector bitwise and
- Vector bitwise and
- Vector bitwise and
- Vector bitwise and
- Vector bitwise and
- Vector bitwise and
- Vector bitwise and
- Vector bitwise and
- Vector bitwise and
- Vector bitwise and
- Vector bitwise and
- Bit clear and exclusive OR
- Bit clear and exclusive OR
- Bit clear and exclusive OR
- Bit clear and exclusive OR
- Bit clear and exclusive OR
- Bit clear and exclusive OR
- Bit clear and exclusive OR
- Bit clear and exclusive OR
- Vector bitwise bit clear
- Vector bitwise bit clear
- Vector bitwise bit clear
- Vector bitwise bit clear
- Vector bitwise bit clear
- Vector bitwise bit clear
- Vector bitwise bit clear
- Vector bitwise bit clear
- Vector bitwise bit clear
- Vector bitwise bit clear
- Vector bitwise bit clear
- Vector bitwise bit clear
- Vector bitwise bit clear
- Vector bitwise bit clear
- Vector bitwise bit clear
- Vector bitwise bit clear
- Bitwise Select.
- Bitwise Select.
- Bitwise Select.
- Bitwise Select instructions. This instruction sets each bit in the destination SIMD&FP register to the corresponding bit from the first source SIMD&FP register when the original destination bit was 1, otherwise from the second source SIMD&FP register. Bitwise Select.
- Bitwise Select.
- Bitwise Select.
- Bitwise Select.
- Bitwise Select.
- Bitwise Select.
- Bitwise Select.
- Bitwise Select.
- Bitwise Select. (128-bit)
- Bitwise Select. (128-bit)
- Bitwise Select. (128-bit)
- Bitwise Select. (128-bit)
- Bitwise Select. (128-bit)
- Bitwise Select. (128-bit)
- Bitwise Select. (128-bit)
- Bitwise Select. (128-bit)
- Bitwise Select. (128-bit)
- Bitwise Select. (128-bit)
- Bitwise Select. (128-bit)
- Floating-point complex add
- Floating-point complex add
- Floating-point complex add
- Floating-point complex add
- Floating-point complex add
- Floating-point complex add
- Floating-point absolute compare greater than or equal
- Floating-point absolute compare greater than or equal
- Floating-point absolute compare greater than
- Floating-point absolute compare greater than
- Floating-point absolute compare less than or equal
- Floating-point absolute compare less than or equal
- Floating-point absolute compare less than
- Floating-point absolute compare less than
- Floating-point compare equal
- Compare bitwise Equal (vector)
- Compare bitwise Equal (vector)
- Compare bitwise Equal (vector)
- Compare bitwise Equal (vector)
- Compare bitwise Equal (vector)
- Compare bitwise Equal (vector)
- Compare bitwise Equal (vector)
- Floating-point compare equal
- Compare bitwise Equal (vector)
- Compare bitwise Equal (vector)
- Compare bitwise Equal (vector)
- Compare bitwise Equal (vector)
- Compare bitwise Equal (vector)
- Compare bitwise Equal (vector)
- Compare bitwise Equal (vector)
- Floating-point compare greater than or equal
- Compare signed greater than or equal
- Compare signed greater than or equal
- Compare signed greater than or equal
- Compare unsigned greater than or equal
- Compare unsigned greater than or equal
- Compare unsigned greater than or equal
- Floating-point compare greater than or equal
- Compare signed greater than or equal
- Compare signed greater than or equal
- Compare signed greater than or equal
- Compare unsigned greater than or equal
- Compare unsigned greater than or equal
- Compare unsigned greater than or equal
- Floating-point compare greater than
- Compare signed greater than
- Compare signed greater than
- Compare signed greater than
- Compare unsigned greater than
- Compare unsigned greater than
- Compare unsigned greater than
- Floating-point compare greater than
- Compare signed greater than
- Compare signed greater than
- Compare signed greater than
- Compare unsigned greater than
- Compare unsigned greater than
- Compare unsigned greater than
- Floating-point compare less than or equal
- Compare signed less than or equal
- Compare signed less than or equal
- Compare signed less than or equal
- Compare unsigned less than or equal
- Compare unsigned less than or equal
- Compare unsigned less than or equal
- Floating-point compare less than or equal
- Compare signed less than or equal
- Compare signed less than or equal
- Compare signed less than or equal
- Compare unsigned less than or equal
- Compare unsigned less than or equal
- Compare unsigned less than or equal
- Count leading sign bits
- Count leading sign bits
- Count leading sign bits
- Count leading sign bits
- Count leading sign bits
- Count leading sign bits
- Count leading sign bits
- Count leading sign bits
- Count leading sign bits
- Count leading sign bits
- Count leading sign bits
- Count leading sign bits
- Floating-point compare less than
- Compare signed less than
- Compare signed less than
- Compare signed less than
- Compare unsigned less than
- Compare unsigned less than
- Compare unsigned less than
- Floating-point compare less than
- Compare signed less than
- Compare signed less than
- Compare signed less than
- Compare unsigned less than
- Compare unsigned less than
- Compare unsigned less than
- Count leading zero bits
- Count leading zero bits
- Count leading zero bits
- Count leading zero bits
- Count leading zero bits
- Count leading zero bits
- Count leading zero bits
- Count leading zero bits
- Count leading zero bits
- Count leading zero bits
- Count leading zero bits
- Count leading zero bits
- Floating-point complex multiply accumulate
- Floating-point complex multiply accumulate
- Floating-point complex multiply accumulate
- Floating-point complex multiply accumulate
- Floating-point complex multiply accumulate
- Floating-point complex multiply accumulate
- Floating-point complex multiply accumulate
- Floating-point complex multiply accumulate
- Floating-point complex multiply accumulate
- Floating-point complex multiply accumulate
- Floating-point complex multiply accumulate
- Floating-point complex multiply accumulate
- Floating-point complex multiply accumulate
- Floating-point complex multiply accumulate
- Floating-point complex multiply accumulate
- Floating-point complex multiply accumulate
- Floating-point complex multiply accumulate
- Floating-point complex multiply accumulate
- Floating-point complex multiply accumulate
- Floating-point complex multiply accumulate
- Floating-point complex multiply accumulate
- Floating-point complex multiply accumulate
- Floating-point complex multiply accumulate
- Floating-point complex multiply accumulate
- Floating-point complex multiply accumulate
- Floating-point complex multiply accumulate
- Floating-point complex multiply accumulate
- Floating-point complex multiply accumulate
- Population count per byte.
- Population count per byte.
- Population count per byte.
- Population count per byte.
- Population count per byte.
- Population count per byte.
- Vector combine
- Vector combine
- Vector combine
- Vector combine
- Vector combine
- Vector combine
- Vector combine
- Vector combine
- Vector combine
- Insert vector element from another vector element
- Insert vector element from another vector element
- Insert vector element from another vector element
- Insert vector element from another vector element
- Insert vector element from another vector element
- Insert vector element from another vector element
- Insert vector element from another vector element
- Insert vector element from another vector element
- Insert vector element from another vector element
- Insert vector element from another vector element
- Insert vector element from another vector element
- Insert vector element from another vector element
- Fixed-point convert to floating-point
- Fixed-point convert to floating-point
- Fixed-point convert to floating-point
- Fixed-point convert to floating-point
- Floating-point convert to fixed-point, rounding toward zero
- Floating-point convert to fixed-point, rounding toward zero
- Floating-point convert to signed fixed-point, rounding toward zero
- Floating-point convert to unsigned fixed-point, rounding toward zero
- Fixed-point convert to floating-point
- Fixed-point convert to floating-point
- Fixed-point convert to floating-point
- Fixed-point convert to floating-point
- Floating-point convert to fixed-point, rounding toward zero
- Floating-point convert to fixed-point, rounding toward zero
- Floating-point convert to signed fixed-point, rounding toward zero
- Floating-point convert to unsigned fixed-point, rounding toward zero
- Dot product arithmetic (indexed)
- Dot product arithmetic (indexed)
- Dot product arithmetic (indexed)
- Dot product arithmetic (indexed)
- Dot product arithmetic (vector)
- Dot product arithmetic (vector)
- Dot product arithmetic (indexed)
- Dot product arithmetic (indexed)
- Dot product arithmetic (indexed)
- Dot product arithmetic (indexed)
- Dot product arithmetic (vector)
- Dot product arithmetic (vector)
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Set all vector lanes to the same value
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Three-way exclusive OR
- Three-way exclusive OR
- Three-way exclusive OR
- Three-way exclusive OR
- Three-way exclusive OR
- Three-way exclusive OR
- Three-way exclusive OR
- Three-way exclusive OR
- Vector bitwise exclusive or (vector)
- Vector bitwise exclusive or (vector)
- Vector bitwise exclusive or (vector)
- Vector bitwise exclusive or (vector)
- Vector bitwise exclusive or (vector)
- Vector bitwise exclusive or (vector)
- Vector bitwise exclusive or (vector)
- Vector bitwise exclusive or (vector)
- Vector bitwise exclusive or (vector)
- Vector bitwise exclusive or (vector)
- Vector bitwise exclusive or (vector)
- Vector bitwise exclusive or (vector)
- Vector bitwise exclusive or (vector)
- Vector bitwise exclusive or (vector)
- Vector bitwise exclusive or (vector)
- Vector bitwise exclusive or (vector)
- Extract vector from pair of vectors
- Extract vector from pair of vectors
- Extract vector from pair of vectors
- Extract vector from pair of vectors
- Extract vector from pair of vectors
- Extract vector from pair of vectors
- Extract vector from pair of vectors
- Extract vector from pair of vectors
- Extract vector from pair of vectors
- Extract vector from pair of vectors
- Extract vector from pair of vectors
- Extract vector from pair of vectors
- Extract vector from pair of vectors
- Extract vector from pair of vectors
- Extract vector from pair of vectors
- Extract vector from pair of vectors
- Extract vector from pair of vectors
- Extract vector from pair of vectors
- Extract vector from pair of vectors
- Extract vector from pair of vectors
- Extract vector from pair of vectors
- Extract vector from pair of vectors
- Floating-point fused Multiply-Add to accumulator(vector)
- Floating-point fused Multiply-Add to accumulator(vector)
- Floating-point fused Multiply-Add to accumulator(vector)
- Floating-point fused Multiply-Add to accumulator(vector)
- Floating-point fused multiply-subtract from accumulator
- Floating-point fused Multiply-subtract to accumulator(vector)
- Floating-point fused multiply-subtract from accumulator
- Floating-point fused Multiply-subtract to accumulator(vector)
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Move vector element to general-purpose register
- Move vector element to general-purpose register
- Move vector element to general-purpose register
- Move vector element to general-purpose register
- Move vector element to general-purpose register
- Move vector element to general-purpose register
- Move vector element to general-purpose register
- Move vector element to general-purpose register
- Move vector element to general-purpose register
- Move vector element to general-purpose register
- Move vector element to general-purpose register
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Move vector element to general-purpose register
- Move vector element to general-purpose register
- Move vector element to general-purpose register
- Move vector element to general-purpose register
- Move vector element to general-purpose register
- Move vector element to general-purpose register
- Move vector element to general-purpose register
- Move vector element to general-purpose register
- Move vector element to general-purpose register
- Move vector element to general-purpose register
- Move vector element to general-purpose register
- Halving add
- Halving add
- Halving add
- Halving add
- Halving add
- Halving add
- Halving add
- Halving add
- Halving add
- Halving add
- Halving add
- Halving add
- Signed halving subtract
- Signed halving subtract
- Signed halving subtract
- Signed halving subtract
- Signed halving subtract
- Signed halving subtract
- Signed halving subtract
- Signed halving subtract
- Signed halving subtract
- Signed halving subtract
- Signed halving subtract
- Signed halving subtract
- Load one single-element structure and Replicate to all lanes (of one register).
- Load one single-element structure and Replicate to all lanes (of one register).
- Load one single-element structure and Replicate to all lanes (of one register).
- Load one single-element structure and Replicate to all lanes (of one register).
- Load one single-element structure and Replicate to all lanes (of one register).
- Load one single-element structure and Replicate to all lanes (of one register).
- Load one single-element structure and Replicate to all lanes (of one register).
- Load one single-element structure and Replicate to all lanes (of one register).
- Load one single-element structure and Replicate to all lanes (of one register).
- Load one single-element structure and Replicate to all lanes (of one register).
- Load one single-element structure and Replicate to all lanes (of one register).
- Load one single-element structure and Replicate to all lanes (of one register).
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load one single-element structure to one lane of one register.
- Load one single-element structure to one lane of one register.
- Load one single-element structure to one lane of one register.
- Load one single-element structure to one lane of one register.
- Load one single-element structure to one lane of one register.
- Load one single-element structure to one lane of one register.
- Load one single-element structure to one lane of one register.
- Load one single-element structure to one lane of one register.
- Load one single-element structure to one lane of one register.
- Load one single-element structure to one lane of one register.
- Load one single-element structure to one lane of one register.
- Load one single-element structure to one lane of one register.
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load one single-element structure and Replicate to all lanes (of one register).
- Load one single-element structure and Replicate to all lanes (of one register).
- Load one single-element structure and Replicate to all lanes (of one register).
- Load one single-element structure and Replicate to all lanes (of one register).
- Load one single-element structure and Replicate to all lanes (of one register).
- Load one single-element structure and Replicate to all lanes (of one register).
- Load one single-element structure and Replicate to all lanes (of one register).
- Load one single-element structure and Replicate to all lanes (of one register).
- Load one single-element structure and Replicate to all lanes (of one register).
- Load one single-element structure and Replicate to all lanes (of one register).
- Load one single-element structure and Replicate to all lanes (of one register).
- Load one single-element structure and Replicate to all lanes (of one register).
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load one single-element structure to one lane of one register.
- Load one single-element structure to one lane of one register.
- Load one single-element structure to one lane of one register.
- Load one single-element structure to one lane of one register.
- Load one single-element structure to one lane of one register.
- Load one single-element structure to one lane of one register.
- Load one single-element structure to one lane of one register.
- Load one single-element structure to one lane of one register.
- Load one single-element structure to one lane of one register.
- Load one single-element structure to one lane of one register.
- Load one single-element structure to one lane of one register.
- Load one single-element structure to one lane of one register.
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load multiple single-element structures to one, two, three, or four registers
- Load single 2-element structure and replicate to all lanes of two registers
- Load single 2-element structure and replicate to all lanes of two registers
- Load single 2-element structure and replicate to all lanes of two registers
- Load single 2-element structure and replicate to all lanes of two registers
- Load single 2-element structure and replicate to all lanes of two registers
- Load single 2-element structure and replicate to all lanes of two registers
- Load single 2-element structure and replicate to all lanes of two registers
- Load single 2-element structure and replicate to all lanes of two registers
- Load single 2-element structure and replicate to all lanes of two registers
- Load single 2-element structure and replicate to all lanes of two registers
- Load single 2-element structure and replicate to all lanes of two registers
- Load single 2-element structure and replicate to all lanes of two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load single 2-element structure and replicate to all lanes of two registers
- Load single 2-element structure and replicate to all lanes of two registers
- Load single 2-element structure and replicate to all lanes of two registers
- Load single 2-element structure and replicate to all lanes of two registers
- Load single 2-element structure and replicate to all lanes of two registers
- Load single 2-element structure and replicate to all lanes of two registers
- Load single 2-element structure and replicate to all lanes of two registers
- Load single 2-element structure and replicate to all lanes of two registers
- Load single 2-element structure and replicate to all lanes of two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load multiple 2-element structures to two registers
- Load single 3-element structure and replicate to all lanes of three registers
- Load single 3-element structure and replicate to all lanes of three registers
- Load single 3-element structure and replicate to all lanes of three registers
- Load single 3-element structure and replicate to all lanes of three registers
- Load single 3-element structure and replicate to all lanes of three registers
- Load single 3-element structure and replicate to all lanes of three registers
- Load single 3-element structure and replicate to all lanes of three registers
- Load single 3-element structure and replicate to all lanes of three registers
- Load single 3-element structure and replicate to all lanes of three registers
- Load single 3-element structure and replicate to all lanes of three registers
- Load single 3-element structure and replicate to all lanes of three registers
- Load single 3-element structure and replicate to all lanes of three registers
- Load multiple 3-element structures to three registers
- Load multiple 3-element structures to three registers
- Load multiple 3-element structures to three registers
- Load multiple 3-element structures to three registers
- Load multiple 3-element structures to two registers
- Load multiple 3-element structures to two registers
- Load multiple 3-element structures to two registers
- Load multiple 3-element structures to three registers
- Load multiple 3-element structures to three registers
- Load multiple 3-element structures to three registers
- Load multiple 3-element structures to three registers
- Load multiple 3-element structures to three registers
- Load multiple 3-element structures to three registers
- Load multiple 3-element structures to three registers
- Load multiple 3-element structures to three registers
- Load multiple 3-element structures to three registers
- Load multiple 3-element structures to three registers
- Load multiple 3-element structures to three registers
- Load multiple 3-element structures to three registers
- Load multiple 3-element structures to three registers
- Load multiple 3-element structures to three registers
- Load single 3-element structure and replicate to all lanes of three registers
- Load single 3-element structure and replicate to all lanes of three registers
- Load single 3-element structure and replicate to all lanes of three registers
- Load single 3-element structure and replicate to all lanes of three registers
- Load single 3-element structure and replicate to all lanes of three registers
- Load single 3-element structure and replicate to all lanes of three registers
- Load single 3-element structure and replicate to all lanes of three registers
- Load single 3-element structure and replicate to all lanes of three registers
- Load single 3-element structure and replicate to all lanes of three registers
- Load multiple 3-element structures to three registers
- Load multiple 3-element structures to three registers
- Load multiple 3-element structures to three registers
- Load multiple 3-element structures to two registers
- Load multiple 3-element structures to two registers
- Load multiple 3-element structures to three registers
- Load multiple 3-element structures to three registers
- Load multiple 3-element structures to three registers
- Load multiple 3-element structures to three registers
- Load multiple 3-element structures to three registers
- Load multiple 3-element structures to three registers
- Load multiple 3-element structures to three registers
- Load multiple 3-element structures to three registers
- Load multiple 3-element structures to three registers
- Load multiple 3-element structures to three registers
- Load single 4-element structure and replicate to all lanes of four registers
- Load single 4-element structure and replicate to all lanes of four registers
- Load single 4-element structure and replicate to all lanes of four registers
- Load single 4-element structure and replicate to all lanes of four registers
- Load single 4-element structure and replicate to all lanes of four registers
- Load single 4-element structure and replicate to all lanes of four registers
- Load single 4-element structure and replicate to all lanes of four registers
- Load single 4-element structure and replicate to all lanes of four registers
- Load single 4-element structure and replicate to all lanes of four registers
- Load single 4-element structure and replicate to all lanes of four registers
- Load single 4-element structure and replicate to all lanes of four registers
- Load single 4-element structure and replicate to all lanes of four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load single 4-element structure and replicate to all lanes of four registers
- Load single 4-element structure and replicate to all lanes of four registers
- Load single 4-element structure and replicate to all lanes of four registers
- Load single 4-element structure and replicate to all lanes of four registers
- Load single 4-element structure and replicate to all lanes of four registers
- Load single 4-element structure and replicate to all lanes of four registers
- Load single 4-element structure and replicate to all lanes of four registers
- Load single 4-element structure and replicate to all lanes of four registers
- Load single 4-element structure and replicate to all lanes of four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load multiple 4-element structures to four registers
- Load SIMD&FP register (immediate offset)
- Maximum (vector)
- Maximum (vector)
- Maximum (vector)
- Maximum (vector)
- Maximum (vector)
- Maximum (vector)
- Maximum (vector)
- Floating-point Maximum Number (vector)
- Floating-point Maximum Number (vector)
- Maximum (vector)
- Maximum (vector)
- Maximum (vector)
- Maximum (vector)
- Maximum (vector)
- Maximum (vector)
- Maximum (vector)
- Minimum (vector)
- Minimum (vector)
- Minimum (vector)
- Minimum (vector)
- Minimum (vector)
- Minimum (vector)
- Minimum (vector)
- Floating-point Minimum Number (vector)
- Floating-point Minimum Number (vector)
- Minimum (vector)
- Minimum (vector)
- Minimum (vector)
- Minimum (vector)
- Minimum (vector)
- Minimum (vector)
- Minimum (vector)
- Floating-point multiply-add to accumulator
- Vector multiply accumulate with scalar
- Vector multiply accumulate with scalar
- Vector multiply accumulate with scalar
- Vector multiply accumulate with scalar
- Vector multiply accumulate with scalar
- Vector multiply accumulate with scalar
- Vector multiply accumulate with scalar
- Vector multiply accumulate with scalar
- Vector multiply accumulate with scalar
- Vector multiply accumulate with scalar
- Vector multiply accumulate with scalar
- Vector multiply accumulate with scalar
- Vector multiply accumulate with scalar
- Vector multiply accumulate with scalar
- Vector multiply accumulate with scalar
- Multiply-add to accumulator
- Multiply-add to accumulator
- Multiply-add to accumulator
- Multiply-add to accumulator
- Multiply-add to accumulator
- Multiply-add to accumulator
- Vector widening multiply accumulate with scalar
- Vector widening multiply accumulate with scalar
- Vector widening multiply accumulate with scalar
- Vector widening multiply accumulate with scalar
- Vector widening multiply accumulate with scalar
- Vector widening multiply accumulate with scalar
- Vector widening multiply accumulate with scalar
- Vector widening multiply accumulate with scalar
- Vector widening multiply accumulate with scalar
- Vector widening multiply accumulate with scalar
- Vector widening multiply accumulate with scalar
- Vector widening multiply accumulate with scalar
- Signed multiply-add long
- Signed multiply-add long
- Signed multiply-add long
- Unsigned multiply-add long
- Unsigned multiply-add long
- Unsigned multiply-add long
- Floating-point multiply-add to accumulator
- Vector multiply accumulate with scalar
- Vector multiply accumulate with scalar
- Vector multiply accumulate with scalar
- Vector multiply accumulate with scalar
- Vector multiply accumulate with scalar
- Vector multiply accumulate with scalar
- Vector multiply accumulate with scalar
- Vector multiply accumulate with scalar
- Vector multiply accumulate with scalar
- Vector multiply accumulate with scalar
- Vector multiply accumulate with scalar
- Vector multiply accumulate with scalar
- Vector multiply accumulate with scalar
- Vector multiply accumulate with scalar
- Vector multiply accumulate with scalar
- Multiply-add to accumulator
- Multiply-add to accumulator
- Multiply-add to accumulator
- Multiply-add to accumulator
- Multiply-add to accumulator
- Multiply-add to accumulator
- Floating-point multiply-subtract from accumulator
- Vector multiply subtract with scalar
- Vector multiply subtract with scalar
- Vector multiply subtract with scalar
- Vector multiply subtract with scalar
- Vector multiply subtract with scalar
- Vector multiply subtract with scalar
- Vector multiply subtract with scalar
- Vector multiply subtract with scalar
- Vector multiply subtract with scalar
- Vector multiply subtract with scalar
- Vector multiply subtract with scalar
- Vector multiply subtract with scalar
- Vector multiply subtract with scalar
- Vector multiply subtract with scalar
- Vector multiply subtract with scalar
- Multiply-subtract from accumulator
- Multiply-subtract from accumulator
- Multiply-subtract from accumulator
- Multiply-subtract from accumulator
- Multiply-subtract from accumulator
- Multiply-subtract from accumulator
- Vector widening multiply subtract with scalar
- Vector widening multiply subtract with scalar
- Vector widening multiply subtract with scalar
- Vector widening multiply subtract with scalar
- Vector widening multiply subtract with scalar
- Vector widening multiply subtract with scalar
- Vector widening multiply subtract with scalar
- Vector widening multiply subtract with scalar
- Vector widening multiply subtract with scalar
- Vector widening multiply subtract with scalar
- Vector widening multiply subtract with scalar
- Vector widening multiply subtract with scalar
- Signed multiply-subtract long
- Signed multiply-subtract long
- Signed multiply-subtract long
- Unsigned multiply-subtract long
- Unsigned multiply-subtract long
- Unsigned multiply-subtract long
- Floating-point multiply-subtract from accumulator
- Vector multiply subtract with scalar
- Vector multiply subtract with scalar
- Vector multiply subtract with scalar
- Vector multiply subtract with scalar
- Vector multiply subtract with scalar
- Vector multiply subtract with scalar
- Vector multiply subtract with scalar
- Vector multiply subtract with scalar
- Vector multiply subtract with scalar
- Vector multiply subtract with scalar
- Vector multiply subtract with scalar
- Vector multiply subtract with scalar
- Vector multiply subtract with scalar
- Vector multiply subtract with scalar
- Vector multiply subtract with scalar
- Multiply-subtract from accumulator
- Multiply-subtract from accumulator
- Multiply-subtract from accumulator
- Multiply-subtract from accumulator
- Multiply-subtract from accumulator
- Multiply-subtract from accumulator
- 8-bit integer matrix multiply-accumulate
- 8-bit integer matrix multiply-accumulate
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Vector long move.
- Vector long move.
- Vector long move.
- Vector long move.
- Vector long move.
- Vector long move.
- Vector narrow integer.
- Vector narrow integer.
- Vector narrow integer.
- Vector narrow integer.
- Vector narrow integer.
- Vector narrow integer.
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Duplicate vector element to vector or scalar
- Multiply
- Floating-point multiply
- Multiply
- Multiply
- Multiply
- Multiply
- Floating-point multiply
- Multiply
- Multiply
- Multiply
- Multiply
- Vector multiply by scalar
- Vector multiply by scalar
- Vector multiply by scalar
- Vector multiply by scalar
- Vector multiply by scalar
- Polynomial multiply
- Multiply
- Multiply
- Multiply
- Multiply
- Multiply
- Multiply
- Vector long multiply by scalar
- Vector long multiply by scalar
- Vector long multiply by scalar
- Vector long multiply by scalar
- Vector long multiply by scalar
- Vector long multiply by scalar
- Vector long multiply by scalar
- Vector long multiply by scalar
- Vector long multiply with scalar
- Vector long multiply with scalar
- Vector long multiply with scalar
- Vector long multiply with scalar
- Polynomial multiply long
- Signed multiply long
- Signed multiply long
- Signed multiply long
- Unsigned multiply long
- Unsigned multiply long
- Unsigned multiply long
- Multiply
- Floating-point multiply
- Multiply
- Multiply
- Multiply
- Multiply
- Floating-point multiply
- Multiply
- Multiply
- Multiply
- Multiply
- Vector multiply by scalar
- Vector multiply by scalar
- Vector multiply by scalar
- Vector multiply by scalar
- Vector multiply by scalar
- Polynomial multiply
- Multiply
- Multiply
- Multiply
- Multiply
- Multiply
- Multiply
- Vector bitwise not.
- Vector bitwise not.
- Vector bitwise not.
- Vector bitwise not.
- Vector bitwise not.
- Vector bitwise not.
- Vector bitwise not.
- Vector bitwise not.
- Vector bitwise not.
- Vector bitwise not.
- Vector bitwise not.
- Vector bitwise not.
- Vector bitwise not.
- Vector bitwise not.
- Negate
- Negate
- Negate
- Negate
- Negate
- Negate
- Negate
- Negate
- Vector bitwise inclusive OR NOT
- Vector bitwise inclusive OR NOT
- Vector bitwise inclusive OR NOT
- Vector bitwise inclusive OR NOT
- Vector bitwise inclusive OR NOT
- Vector bitwise inclusive OR NOT
- Vector bitwise inclusive OR NOT
- Vector bitwise inclusive OR NOT
- Vector bitwise inclusive OR NOT
- Vector bitwise inclusive OR NOT
- Vector bitwise inclusive OR NOT
- Vector bitwise inclusive OR NOT
- Vector bitwise inclusive OR NOT
- Vector bitwise inclusive OR NOT
- Vector bitwise inclusive OR NOT
- Vector bitwise inclusive OR NOT
- Vector bitwise or (immediate, inclusive)
- Vector bitwise or (immediate, inclusive)
- Vector bitwise or (immediate, inclusive)
- Vector bitwise or (immediate, inclusive)
- Vector bitwise or (immediate, inclusive)
- Vector bitwise or (immediate, inclusive)
- Vector bitwise or (immediate, inclusive)
- Vector bitwise or (immediate, inclusive)
- Vector bitwise or (immediate, inclusive)
- Vector bitwise or (immediate, inclusive)
- Vector bitwise or (immediate, inclusive)
- Vector bitwise or (immediate, inclusive)
- Vector bitwise or (immediate, inclusive)
- Vector bitwise or (immediate, inclusive)
- Vector bitwise or (immediate, inclusive)
- Vector bitwise or (immediate, inclusive)
- Signed Add and Accumulate Long Pairwise.
- Signed Add and Accumulate Long Pairwise.
- Signed Add and Accumulate Long Pairwise.
- Unsigned Add and Accumulate Long Pairwise.
- Unsigned Add and Accumulate Long Pairwise.
- Unsigned Add and Accumulate Long Pairwise.
- Signed Add and Accumulate Long Pairwise.
- Signed Add and Accumulate Long Pairwise.
- Signed Add and Accumulate Long Pairwise.
- Unsigned Add and Accumulate Long Pairwise.
- Unsigned Add and Accumulate Long Pairwise.
- Unsigned Add and Accumulate Long Pairwise.
- Floating-point add pairwise
- Add pairwise.
- Add pairwise.
- Add pairwise.
- Add pairwise.
- Add pairwise.
- Add pairwise.
- Signed Add Long Pairwise.
- Signed Add Long Pairwise.
- Signed Add Long Pairwise.
- Unsigned Add Long Pairwise.
- Unsigned Add Long Pairwise.
- Unsigned Add Long Pairwise.
- Signed Add Long Pairwise.
- Signed Add Long Pairwise.
- Signed Add Long Pairwise.
- Unsigned Add Long Pairwise.
- Unsigned Add Long Pairwise.
- Unsigned Add Long Pairwise.
- Folding maximum of adjacent pairs
- Folding maximum of adjacent pairs
- Folding maximum of adjacent pairs
- Folding maximum of adjacent pairs
- Folding maximum of adjacent pairs
- Folding maximum of adjacent pairs
- Folding maximum of adjacent pairs
- Folding minimum of adjacent pairs
- Folding minimum of adjacent pairs
- Folding minimum of adjacent pairs
- Folding minimum of adjacent pairs
- Folding minimum of adjacent pairs
- Folding minimum of adjacent pairs
- Folding minimum of adjacent pairs
- Signed saturating Absolute value
- Signed saturating Absolute value
- Signed saturating Absolute value
- Signed saturating Absolute value
- Signed saturating Absolute value
- Signed saturating Absolute value
- Saturating add
- Saturating add
- Saturating add
- Saturating add
- Saturating add
- Saturating add
- Saturating add
- Saturating add
- Saturating add
- Saturating add
- Saturating add
- Saturating add
- Saturating add
- Saturating add
- Saturating add
- Saturating add
- Vector widening saturating doubling multiply accumulate with scalar
- Vector widening saturating doubling multiply accumulate with scalar
- Vector widening saturating doubling multiply accumulate with scalar
- Vector widening saturating doubling multiply accumulate with scalar
- Signed saturating doubling multiply-add long
- Signed saturating doubling multiply-add long
- Vector widening saturating doubling multiply subtract with scalar
- Vector widening saturating doubling multiply subtract with scalar
- Vector widening saturating doubling multiply subtract with scalar
- Vector widening saturating doubling multiply subtract with scalar
- Signed saturating doubling multiply-subtract long
- Signed saturating doubling multiply-subtract long
- Vector saturating doubling multiply high by scalar
- Vector saturating doubling multiply high by scalar
- Vector saturating doubling multiply high with scalar
- Vector saturating doubling multiply high with scalar
- Signed saturating doubling multiply returning high half
- Signed saturating doubling multiply returning high half
- Vector saturating doubling multiply high by scalar
- Vector saturating doubling multiply high by scalar
- Vector saturating doubling multiply high with scalar
- Vector saturating doubling multiply high with scalar
- Signed saturating doubling multiply returning high half
- Signed saturating doubling multiply returning high half
- Vector saturating doubling long multiply by scalar
- Vector saturating doubling long multiply by scalar
- Vector saturating doubling long multiply with scalar
- Vector saturating doubling long multiply with scalar
- Signed saturating doubling multiply long
- Signed saturating doubling multiply long
- Signed saturating extract narrow
- Signed saturating extract narrow
- Signed saturating extract narrow
- Unsigned saturating extract narrow
- Unsigned saturating extract narrow
- Unsigned saturating extract narrow
- Signed saturating extract unsigned narrow
- Signed saturating extract unsigned narrow
- Signed saturating extract unsigned narrow
- Signed saturating negate
- Signed saturating negate
- Signed saturating negate
- Signed saturating negate
- Signed saturating negate
- Signed saturating negate
- Vector rounding saturating doubling multiply high by scalar
- Vector rounding saturating doubling multiply high by scalar
- Vector rounding saturating doubling multiply high by scalar
- Vector rounding saturating doubling multiply high by scalar
- Vector saturating rounding doubling multiply high with scalar
- Vector saturating rounding doubling multiply high with scalar
- Signed saturating rounding doubling multiply returning high half
- Signed saturating rounding doubling multiply returning high half
- Vector rounding saturating doubling multiply high by scalar
- Vector rounding saturating doubling multiply high by scalar
- Vector rounding saturating doubling multiply high by scalar
- Vector rounding saturating doubling multiply high by scalar
- Vector saturating rounding doubling multiply high with scalar
- Vector saturating rounding doubling multiply high with scalar
- Signed saturating rounding doubling multiply returning high half
- Signed saturating rounding doubling multiply returning high half
- Signed saturating rounding shift left
- Signed saturating rounding shift left
- Signed saturating rounding shift left
- Signed saturating rounding shift left
- Unsigned signed saturating rounding shift left
- Unsigned signed saturating rounding shift left
- Unsigned signed saturating rounding shift left
- Unsigned signed saturating rounding shift left
- Signed saturating rounding shift left
- Signed saturating rounding shift left
- Signed saturating rounding shift left
- Signed saturating rounding shift left
- Unsigned signed saturating rounding shift left
- Unsigned signed saturating rounding shift left
- Unsigned signed saturating rounding shift left
- Unsigned signed saturating rounding shift left
- Signed saturating rounded shift right narrow
- Signed saturating rounded shift right narrow
- Signed saturating rounded shift right narrow
- Unsigned signed saturating rounded shift right narrow
- Unsigned signed saturating rounded shift right narrow
- Unsigned signed saturating rounded shift right narrow
- Signed saturating rounded shift right unsigned narrow
- Signed saturating rounded shift right unsigned narrow
- Signed saturating rounded shift right unsigned narrow
- Signed saturating shift left
- Signed saturating shift left
- Signed saturating shift left
- Signed saturating shift left
- Unsigned saturating shift left
- Unsigned saturating shift left
- Unsigned saturating shift left
- Unsigned saturating shift left
- Signed saturating shift left
- Signed saturating shift left
- Signed saturating shift left
- Signed saturating shift left
- Unsigned saturating shift left
- Unsigned saturating shift left
- Unsigned saturating shift left
- Unsigned saturating shift left
- Signed saturating shift left
- Signed saturating shift left
- Signed saturating shift left
- Signed saturating shift left
- Unsigned saturating shift left
- Unsigned saturating shift left
- Unsigned saturating shift left
- Unsigned saturating shift left
- Signed saturating shift left
- Signed saturating shift left
- Signed saturating shift left
- Signed saturating shift left
- Unsigned saturating shift left
- Unsigned saturating shift left
- Unsigned saturating shift left
- Unsigned saturating shift left
- Signed saturating shift left unsigned
- Signed saturating shift left unsigned
- Signed saturating shift left unsigned
- Signed saturating shift left unsigned
- Signed saturating shift left unsigned
- Signed saturating shift left unsigned
- Signed saturating shift left unsigned
- Signed saturating shift left unsigned
- Signed saturating shift right narrow
- Signed saturating shift right narrow
- Signed saturating shift right narrow
- Unsigned saturating shift right narrow
- Unsigned saturating shift right narrow
- Unsigned saturating shift right narrow
- Signed saturating shift right unsigned narrow
- Signed saturating shift right unsigned narrow
- Signed saturating shift right unsigned narrow
- Saturating subtract
- Saturating subtract
- Saturating subtract
- Saturating subtract
- Saturating subtract
- Saturating subtract
- Saturating subtract
- Saturating subtract
- Saturating subtract
- Saturating subtract
- Saturating subtract
- Saturating subtract
- Saturating subtract
- Saturating subtract
- Saturating subtract
- Saturating subtract
- Rounding Add returning High Narrow (high half).
- Rounding Add returning High Narrow (high half).
- Rounding Add returning High Narrow (high half).
- Rounding Add returning High Narrow (high half).
- Rounding Add returning High Narrow (high half).
- Rounding Add returning High Narrow (high half).
- Rounding Add returning High Narrow.
- Rounding Add returning High Narrow.
- Rounding Add returning High Narrow.
- Rounding Add returning High Narrow.
- Rounding Add returning High Narrow.
- Rounding Add returning High Narrow.
- Rotate and exclusive OR
- Reciprocal estimate.
- Unsigned reciprocal estimate
- Reciprocal estimate.
- Unsigned reciprocal estimate
- Floating-point reciprocal step
- Floating-point reciprocal step
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Vector reinterpret cast operation
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Reversing vector elements (swap endianness)
- Rounding halving add
- Rounding halving add
- Rounding halving add
- Rounding halving add
- Rounding halving add
- Rounding halving add
- Rounding halving add
- Rounding halving add
- Rounding halving add
- Rounding halving add
- Rounding halving add
- Rounding halving add
- Floating-point round to 32-bit integer, using current rounding mode
- Floating-point round to 32-bit integer, using current rounding mode
- Floating-point round to 32-bit integer, using current rounding mode
- Floating-point round to 32-bit integer, using current rounding mode
- Floating-point round to 32-bit integer toward zero
- Floating-point round to 32-bit integer toward zero
- Floating-point round to 32-bit integer toward zero
- Floating-point round to 32-bit integer toward zero
- Floating-point round to 64-bit integer, using current rounding mode
- Floating-point round to 64-bit integer, using current rounding mode
- Floating-point round to 64-bit integer, using current rounding mode
- Floating-point round to 64-bit integer, using current rounding mode
- Floating-point round to 64-bit integer toward zero
- Floating-point round to 64-bit integer toward zero
- Floating-point round to 64-bit integer toward zero
- Floating-point round to 64-bit integer toward zero
- Floating-point round to integral, to nearest with ties to even
- Floating-point round to integral, to nearest with ties to even
- Signed rounding shift left
- Signed rounding shift left
- Signed rounding shift left
- Signed rounding shift left
- Unsigned rounding shift left
- Unsigned rounding shift left
- Unsigned rounding shift left
- Unsigned rounding shift left
- Signed rounding shift left
- Signed rounding shift left
- Signed rounding shift left
- Signed rounding shift left
- Unsigned rounding shift left
- Unsigned rounding shift left
- Unsigned rounding shift left
- Unsigned rounding shift left
- Signed rounding shift right
- Signed rounding shift right
- Signed rounding shift right
- Signed rounding shift right
- Unsigned rounding shift right
- Unsigned rounding shift right
- Unsigned rounding shift right
- Unsigned rounding shift right
- Rounding shift right narrow
- Rounding shift right narrow
- Rounding shift right narrow
- Rounding shift right narrow
- Rounding shift right narrow
- Rounding shift right narrow
- Signed rounding shift right
- Signed rounding shift right
- Signed rounding shift right
- Signed rounding shift right
- Unsigned rounding shift right
- Unsigned rounding shift right
- Unsigned rounding shift right
- Unsigned rounding shift right
- Reciprocal square-root estimate.
- Unsigned reciprocal square root estimate
- Reciprocal square-root estimate.
- Unsigned reciprocal square root estimate
- Floating-point reciprocal square root step
- Floating-point reciprocal square root step
- Signed rounding shift right and accumulate
- Signed rounding shift right and accumulate
- Signed rounding shift right and accumulate
- Signed rounding shift right and accumulate
- Unsigned rounding shift right and accumulate
- Unsigned rounding shift right and accumulate
- Unsigned rounding shift right and accumulate
- Unsigned rounding shift right and accumulate
- Signed rounding shift right and accumulate
- Signed rounding shift right and accumulate
- Signed rounding shift right and accumulate
- Signed rounding shift right and accumulate
- Unsigned rounding shift right and accumulate
- Unsigned rounding shift right and accumulate
- Unsigned rounding shift right and accumulate
- Unsigned rounding shift right and accumulate
- Rounding subtract returning high narrow
- Rounding subtract returning high narrow
- Rounding subtract returning high narrow
- Rounding subtract returning high narrow
- Rounding subtract returning high narrow
- Rounding subtract returning high narrow
- Insert vector element from another vector element
- Insert vector element from another vector element
- Insert vector element from another vector element
- Insert vector element from another vector element
- Insert vector element from another vector element
- Insert vector element from another vector element
- Insert vector element from another vector element
- Insert vector element from another vector element
- Insert vector element from another vector element
- Insert vector element from another vector element
- Insert vector element from another vector element
- Insert vector element from another vector element
- Insert vector element from another vector element
- Insert vector element from another vector element
- Insert vector element from another vector element
- Insert vector element from another vector element
- Insert vector element from another vector element
- Insert vector element from another vector element
- Insert vector element from another vector element
- Insert vector element from another vector element
- Insert vector element from another vector element
- Insert vector element from another vector element
- Insert vector element from another vector element
- Insert vector element from another vector element
- SHA1 hash update accelerator, choose.
- SHA1 fixed rotate.
- SHA1 hash update accelerator, majority.
- SHA1 hash update accelerator, parity.
- SHA1 schedule update accelerator, first part.
- SHA1 schedule update accelerator, second part.
- SHA256 hash update accelerator, upper part.
- SHA256 hash update accelerator.
- SHA256 schedule update accelerator, first part.
- SHA256 schedule update accelerator, second part.
- SHA512 hash update part 2
- SHA512 hash update part 1
- SHA512 schedule update 0
- SHA512 schedule update 1
- Shift left
- Shift left
- Shift left
- Shift left
- Shift left
- Shift left
- Shift left
- Shift left
- Signed Shift left
- Signed Shift left
- Signed Shift left
- Signed Shift left
- Unsigned Shift left
- Unsigned Shift left
- Unsigned Shift left
- Unsigned Shift left
- Signed shift left long
- Signed shift left long
- Signed shift left long
- Signed shift left long
- Signed shift left long
- Signed shift left long
- Shift left
- Shift left
- Shift left
- Shift left
- Shift left
- Shift left
- Shift left
- Shift left
- Signed Shift left
- Signed Shift left
- Signed Shift left
- Signed Shift left
- Unsigned Shift left
- Unsigned Shift left
- Unsigned Shift left
- Unsigned Shift left
- Shift right
- Shift right
- Shift right
- Shift right
- Shift right
- Shift right
- Shift right
- Shift right
- Shift right narrow
- Shift right narrow
- Shift right narrow
- Shift right narrow
- Shift right narrow
- Shift right narrow
- Shift right
- Shift right
- Shift right
- Shift right
- Shift right
- Shift right
- Shift right
- Shift right
- SM3PARTW1
- SM3PARTW2
- SM3SS1
- SM3TT1A
- SM3TT1B
- SM3TT2A
- SM3TT2B
- SM4 key
- SM4 encode
- Signed shift right and accumulate
- Signed shift right and accumulate
- Signed shift right and accumulate
- Signed shift right and accumulate
- Unsigned shift right and accumulate
- Unsigned shift right and accumulate
- Unsigned shift right and accumulate
- Unsigned shift right and accumulate
- Signed shift right and accumulate
- Signed shift right and accumulate
- Signed shift right and accumulate
- Signed shift right and accumulate
- Unsigned shift right and accumulate
- Unsigned shift right and accumulate
- Unsigned shift right and accumulate
- Unsigned shift right and accumulate
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures from one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple single-element structures to one, two, three, or four registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 2-element structures from two registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 3-element structures from three registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store multiple 4-element structures from four registers
- Store SIMD&FP register (immediate offset)
- Subtract
- Subtract
- Subtract
- Subtract
- Subtract
- Subtract
- Subtract
- Subtract
- Subtract
- Subtract returning high narrow
- Subtract returning high narrow
- Subtract returning high narrow
- Subtract returning high narrow
- Subtract returning high narrow
- Subtract returning high narrow
- Subtract returning high narrow
- Subtract returning high narrow
- Subtract returning high narrow
- Subtract returning high narrow
- Subtract returning high narrow
- Subtract returning high narrow
- Signed Subtract Long
- Signed Subtract Long
- Signed Subtract Long
- Unsigned Subtract Long
- Unsigned Subtract Long
- Unsigned Subtract Long
- Subtract
- Subtract
- Subtract
- Subtract
- Subtract
- Subtract
- Subtract
- Subtract
- Subtract
- Signed Subtract Wide
- Signed Subtract Wide
- Signed Subtract Wide
- Unsigned Subtract Wide
- Unsigned Subtract Wide
- Unsigned Subtract Wide
- Dot product index form with signed and unsigned integers
- Dot product index form with signed and unsigned integers
- Dot product index form with signed and unsigned integers
- Dot product index form with signed and unsigned integers
- Transpose elements
- Transpose elements
- Transpose elements
- Transpose elements
- Transpose elements
- Transpose elements
- Transpose elements
- Transpose elements
- Transpose elements
- Transpose elements
- Transpose elements
- Transpose elements
- Transpose elements
- Transpose elements
- Transpose elements
- Transpose elements
- Transpose elements
- Transpose elements
- Signed compare bitwise Test bits nonzero
- Signed compare bitwise Test bits nonzero
- Signed compare bitwise Test bits nonzero
- Signed compare bitwise Test bits nonzero
- Signed compare bitwise Test bits nonzero
- Unsigned compare bitwise Test bits nonzero
- Unsigned compare bitwise Test bits nonzero
- Unsigned compare bitwise Test bits nonzero
- Signed compare bitwise Test bits nonzero
- Signed compare bitwise Test bits nonzero
- Signed compare bitwise Test bits nonzero
- Signed compare bitwise Test bits nonzero
- Signed compare bitwise Test bits nonzero
- Unsigned compare bitwise Test bits nonzero
- Unsigned compare bitwise Test bits nonzero
- Unsigned compare bitwise Test bits nonzero
- Dot product index form with unsigned and signed integers
- Dot product index form with unsigned and signed integers
- Dot product vector form with unsigned and signed integers
- Dot product index form with unsigned and signed integers
- Dot product index form with unsigned and signed integers
- Dot product vector form with unsigned and signed integers
- Unsigned and signed 8-bit integer matrix multiply-accumulate
- Unzip vectors
- Unzip vectors
- Unzip vectors
- Unzip vectors
- Unzip vectors
- Unzip vectors
- Unzip vectors
- Unzip vectors
- Unzip vectors
- Unzip vectors
- Unzip vectors
- Unzip vectors
- Unzip vectors
- Unzip vectors
- Unzip vectors
- Unzip vectors
- Unzip vectors
- Unzip vectors
- Exclusive OR and rotate
- Zip vectors
- Zip vectors
- Zip vectors
- Zip vectors
- Zip vectors
- Zip vectors
- Zip vectors
- Zip vectors
- Zip vectors
- Zip vectors
- Zip vectors
- Zip vectors
- Zip vectors
- Zip vectors
- Zip vectors
- Zip vectors
- Zip vectors
- Zip vectors